74AVC16373DGG,118 NXP Semiconductors, 74AVC16373DGG,118 Datasheet - Page 2

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74AVC16373DGG,118

Manufacturer Part Number
74AVC16373DGG,118
Description
IC 16BIT D TRANSP LATCH 48TSSOP
Manufacturer
NXP Semiconductors
Series
74AVCr
Datasheet

Specifications of 74AVC16373DGG,118

Logic Type
D-Type Transparent Latch
Package / Case
48-TSSOP
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
1.2 V ~ 3.6 V
Independent Circuits
2
Delay Time - Propagation
1.4ns
Current - Output High, Low
12mA, 12mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Number Of Circuits
2
Logic Family
AVC
Polarity
Non-Inverting
Input Bias Current (max)
0.2 uA
High Level Output Current
- 12 mA
Low Level Output Current
8 mA
Propagation Delay Time
2.2 ns at 1.65 V to 1.95 V
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.4 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
935265483118
Philips Semiconductors
FEATURES
2000 Mar 09
handbook, halfpage
Wide supply voltage range from 1.2 to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7
CMOS low power consumption
Input/output tolerant up to 3.6 V
Dynamic Controlled Output (DCO) circuit dynamically
changes output impedance, resulting in noise reduction
without speed degradation
Low inductance multiple V
noise and ground bounce
Supports Live Insertion.
16-bit D-type transparent latch; 3.6 V tolerant;
3-state
Fig.1
(mA)
I OH
100
200
300
0
0
Output voltage as a function of the
HIGH-level output current.
2.5 V
3.3 V
1.8 V
1
CC
2
and GND pins to minimize
3
V OH (V)
MNA506
4
2
DESCRIPTION
The 74AVC16373 is a 16-bit D-type transparent latch
featuring separate D-type inputs for each latch, and
3-state outputs for bus oriented applications. One Latch
Enable (LE) input and one Output Enable (OE) input are
provided per 8-bit section. The 74AVC16373 consist of
two sections of eight D-type transparent latches with
3-state true outputs.
The 74AVC16373 is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, pin OE
through a pull-up resistor (Live Insertion).
A Dynamic Controlled Output (DCO) circuitry is
implemented to support termination line drive during
transient (see Figs 1 and 2).
handbook, halfpage
Fig.2
(mA)
I OL
300
200
100
0
0
Output voltage as a function of the
LOW-level output current.
1.8 V
1
2.5 V
3.3 V
2
n
Product Specification
should be tied to V
74AVC16373
3
V OL (V)
MNA507
4
CC

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