AM29SL800DB120WAC AMD [Advanced Micro Devices], AM29SL800DB120WAC Datasheet
AM29SL800DB120WAC
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AM29SL800DB120WAC Summary of contents
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Am29SL800D Data Sheet The following document contains information on Spansion memory products. Although the document is marked with the name of the company that originally developed the specification, Spansion will continue to offer these products to existing customers. Continuity of ...
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DATA SHEET Am29SL800D 8 Megabit ( 8-Bit/512 K x 16-Bit) CMOS 1.8 Volt-only Super Low Voltage Flash Memory DISTINCTIVE CHARACTERISTICS Single Power Supply Operation — 1.65 to 2.2 V for read, program, and erase operations — Ideal for ...
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GENERAL DESCRIPTION The Am29SL800D Mbit, 1.8 V volt-only Flash- memory organized as 1,048,576 bytes or 524,288 words. The device is offered in 48-pin TSOP and 48- ball FBGA packages. The word-wide data (x16) appears on DQ15–DQ0; the ...
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TABLE OF CONTENTS Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4 Block Diagram . . . . . . . . . . ...
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PRODUCT SELECTOR GUIDE Family Part Number Speed Options Max access time ACC Max CE# access time Max OE# access time Notes: 1. See “AC Characteristics” for full specifications. 2. ...
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CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 A10 WE# 11 RESET RY/BY A18 A17 ...
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PIN CONFIGURATION A0–A18 = 19 addresses DQ0–DQ14 = 15 data inputs/outputs DQ15/A-1 = DQ15 (data input/output, word mode), A-1 (LSB address input, byte mode) BYTE# = Selects 8-bit or 16-bit mode CE# = Chip enable OE# = Output enable WE# ...
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ORDERING INFORMATION Standard Products AMD standard products are available in several packages and operating ranges. The order number (Valid Combi- nation) is formed by a combination of the elements below. Am29SL800D T -100 E C DEVICE NUMBER/DESCRIPTION Am29SL800D 8 Megabit ...
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DEVICE BUS OPERATIONS This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory loca- tion. The register is composed of ...
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Refer to Word/Byte Configuration‚ on page 8 for more information. The device features an Unlock Bypass mode to facili- tate faster programming. Once the device enters the Unlock Bypass mode, only two write cycles are required to program a ...
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Refer to the Table 10 on page 28 for RESET# parame- ters and to Figure 14, on page 29 diagram. Table 2. Am29SL800DT Top Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 ...
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Table 3. Am29SL800DB Bottom Boot Block Sector Address Table Sector A18 A17 A16 A15 SA0 SA1 SA2 SA3 SA4 SA5 ...
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Autoselect Mode The autoselect mode provides manufacturer and device identification, and sector protection verification, through identifier codes output on DQ7–DQ0. This mode is primarily intended for programming equipment to automatically match a device to be programmed with its corresponding programming ...
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START PLSCNT = 1 RESET Wait First Write Temporary Sector Cycle = 60h? Unprotect Mode Yes Set up sector address Sector Protect: Write 60h to sector address with ...
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START RESET (Note 1) Perform Erase or Program Operations RESET Temporary Sector Unprotect Completed (Note 2) Notes: 1. All protected sectors unprotected. 2. All previously protected sectors are protected once again. Figure 2. Temporary ...
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The reset command may be written between the sequence cycles in an erase command sequence before erasing begins. This resets the device to reading array data. Once erasure begins, however, the device ignores reset commands until the operation is complete. ...
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Figure 3 illustrates the algorithm for the program oper- ation. See Table 13 on page 31 for parameters, and to Figure 17, on page 32 for timing diagrams. Write Program Command Sequence Data Poll from System Embedded Program algorithm in ...
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The interrupts can be re-enabled after the last Sector Erase command is written. If the time between additional sector erase commands can be assumed to be less than 50 µs, the system ...
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START Write Erase Command Sequence Data Poll from System No Data = FFh? Yes Erasure Completed Notes: 1. See Table 5 for erase command sequence. 2. See “DQ3: Sector Erase Timer” for more information. Figure 4. Erase Operation 18 D ...
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Table 5. Am29SL800D Command Definitions Command Sequence (Note 1) Read (Note 6) 1 Reset (Note 7) 1 Word Manufacturer ID 4 Byte Word Device ID, 4 Top Boot Block Byte Word Device ID, 4 Bottom Boot Block Byte Word Sector ...
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WRITE OPERATION STATUS The device provides several bits to determine the status of a write operation: DQ2, DQ3, DQ5, DQ6, DQ7, and RY/BY#. Table 6 and the following subsec- tions describe the functions of these bits. DQ7, RY/BY#, and DQ6 ...
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RY/BY#: Ready/Busy# The RY/BY dedicated, open-drain output pin that indicates whether an Embedded Algorithm is in progress or complete. The RY/BY# status is valid after the rising edge of the final WE# pulse in the command sequence. Since ...
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The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 has not gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles, determining the status as ...
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Operation Embedded Program Algorithm Standard Mode Embedded Erase Algorithm Reading within Erase Suspended Sector Erase Suspend Reading within Non-Erase Mode Suspended Sector Erase-Suspend-Program Notes: 1. DQ5 switches to ‘1’ when an Embedded Program or Embedded Erase operation has exceeded the ...
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ABSOLUTE MAXIMUM RATINGS Storage Temperature Plastic Packages ...............................–65°C to +150°C Ambient Temperature with Power Applied............................–65°C to +125°C Voltage with Respect to Ground V (Note 1) ................................ –0 +2 A9, OE#, and RESET# (Note 2)................ –0.5 V ...
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DC CHARACTERISTICS Parameter Description I Input Load Current Input Load Current LIT I Output Leakage Current LO V Active Read Current CC I CC1 (Notes Active Write Current CC I CC2 (Notes 2, 3, ...
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DC CHARACTERISTICS (Continued) Zero Power Flash 500 1000 Note: Addresses are switching at 1 MHz Figure 9. I Current vs. Time (Showing Active and Automatic Sleep Currents) CC1 ...
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TEST CONDITIONS Device Under Test C L Figure 11. Test Setup WAVEFORM Don’t Care, Any Change Permitted 2.0 V 1.0 V Input 0.0 V Figure 12. Input Waveforms and Measurement Levels January 23, 2007 27546A6 ...
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AC CHARACTERISTICS Parameter JEDEC Std Description t t Read Cycle Time (Note 1) AVAV Address to Output Delay AVQV ACC t t Chip Enable to Output Delay ELQV Output Enable to Output Delay GLQV ...
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AC CHARACTERISTICS Parameter JEDEC Std RESET# Pin Low (During Embedded Algorithms) to Read or Write t READY RESET# Pin Low (NOT During Embedded Algorithms) to Read or t READY RESET# High Time Before Read (see Note) RH ...
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AC CHARACTERISTICS Table 12. Word/Byte Configuration (BYTE#) Parameter JEDEC Std t t CE# to BYTE# Switching Low or High ELFL/ ELFH t BYTE# Switching Low to Output HIGH Z FLQZ t BYTE# Switching High to Output Active FHQV CE# OE# ...
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AC CHARACTERISTICS Parameter JEDEC Std t t Write Cycle Time (Note 1) AVAV Address Setup Time AVWL Address Hold Time WLAX Data Setup Time DVWH Data Hold Time ...
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AC CHARACTERISTICS Program Command Sequence (last two cycles Addresses 555h CE A0h Data RY/BY VCS Notes program address program data ...
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AC CHARACTERISTICS Erase Command Sequence (last two cycles Addresses 2AAh CE Data RY/BY# t VCS V CC Notes sector address (for Sector Erase Valid Address ...
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AC CHARACTERISTICS t RC Addresses VA t ACC OE# t OEH WE# DQ7 DQ0–DQ6 t BUSY RY/BY# Note Valid address. Illustration shows first status cycle after command sequence, last status read ...
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AC CHARACTERISTICS Enter Erase Embedded Suspend Erasing Erase Erase Suspend WE# DQ6 DQ2 Note: The system may use CE# or OE# to toggle DQ2 and DQ6. DQ2 toggles only when read at an address within an erase-suspended sector. Parameter JEDEC ...
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AC CHARACTERISTICS RESET# SA, A6, A1, A0 Sector Protect/Unprotect Data 60h 1 µs CE# WE# OE# * For sector protect For sector unprotect ...
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AC CHARACTERISTICS Table 15. Alternate CE# Controlled Erase/Program Operations Parameter JEDEC Std Description t t Write Cycle Time (Note 1) AVAV Address Setup Time AVEL Address Hold Time ELAX Data Setup ...
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AC CHARACTERISTICS 555 for program 2AA for erase Addresses WE# OE# CE Data t RH RESET# RY/BY# Notes program address program data, DQ7# = complement of the data written, ...
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ERASE AND PROGRAMMING PERFORMANCE Table 16. Erase and Programming Performance Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Mode Chip Programming Time (Note 3) Word Mode Notes: 1. Typical program and erase times assume ...
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PHYSICAL DIMENSIONS TS 048—48-Pin Standard TSOP Am29SL800D Dwg rev AA; 10/99 27546A6 January 23, 2007 ...
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PHYSICAL DIMENSIONS FBA048—48-Ball Fine-Pitch Ball Grid Array (FBGA) 8.15 X 6.15 mm Package January 23, 2007 27546A6 Am29SL800D Dwg rev AF; 10/99 41 ...
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PHYSICAL DIMENSIONS FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA Package Am29SL800D Dwg rev AF; 10/99 27546A6 January 23, 2007 ...
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PHYSICAL DIMENSIONS VBK048—48 Ball Fine-Pitch Ball Grid Array (FBGA) 8. INDEX MARK PIN A1 CORNER 10 TOP VIEW A SEATING PLAN E A1 SIDE VIEW PACKAGE VBK 048 JEDEC N/A 8. 6.15 mm NOM ...
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REVISION SUMMARY Revision A (February 4, 2003) Initial release. Revision A+1 (March 17, 2003) Ordering Information Corrected typo in table. Corrected typo to OPNs. Revision A+2 (June 10, 2004) Ordering Information Added Pb-free package OPNs. Revision A+3 (October 27, 2004) ...