AK4687 AKM [Asahi Kasei Microsystems], AK4687 Datasheet - Page 25

• Manufacturer Part Number: AK4687
• Description: Asynchronous Stereo CODEC with Capless Stereo Selector
• Manufacturer: AKM [Asahi Kasei Microsystems]

1-3. Acknowledge
An external device that is sending data to the AK4687 releases the SDA line (“H”) after receiving one-byte of data. An
external device that receives data from the AK4687 then sets the SDA line to “L” at the next clock. This operation is
called “acknowledgement”, and it enables verification that the data transfer has been properly executed. The AK4687
generates an acknowledgement upon receipt of a start condition and Slave address. For a write instruction, an
acknowledgement is generated whenever receipt of each byte is completed. For a read instruction, succeeded by
generation of an acknowledgement, the AK4687 releases the SDA line after outputting data at the designated address, and
it monitors the SDA line condition. When the master side generates an acknowledgement without sending a stop
condition, the AK4687 outputs data at the next address location. When no acknowledgement is generated, the AK4687
ends data output (not acknowledged).
1-4. FIRST BYTE
The First Byte which includes the Slave-address is input after the Start condition is set, and a target IC device that will be
accessed on the bus is selected by the Slave-address. The Slave-address is configured with the upper 7-bits. Data of the
upper 6-bits is “001001”. The next 1 bit is the address bit that selects the desired IC (CAD0 bit). Set CAD0 bit according
to the CAD0 pin setting (CAD0 pin = “L”: CAD0 bit = “0”, CAD0 pin = “H”: CAD0 bit = “1”). When the Slave-address
is inputted, an external device that has the identical device address generates an acknowledgement and executes
commands. The 8
executed, and when it is “0”, a write instruction is executed.
MS1307-E-00
SCL FROM
MASTER
DATA
OUTPUT BY
TRANSMITTER
DATA
OUTPUT BY
RECEIVER
CONDITION
START
th
bit of the First Byte (LSB) is allocated as R/W bit. When the R/W bit is “1”, a read instruction is
0
0
Figure 13. Acknowledge on the I
1
1
Figure 14. The First Byte
0
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0
2
C-bus
1
CAD0
8
R/W
not acknowledge
acknowledge
Clock pulse
for acknowledge
9
[AK4687]
2011/05