HY57V281620FLTP Hynix Semiconductor, HY57V281620FLTP Datasheet - Page 2

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HY57V281620FLTP

Manufacturer Part Number
HY57V281620FLTP
Description
Synchronous DRAM Memory 128Mbit (8Mx16bit)
Manufacturer
Hynix Semiconductor
Datasheet
Rev. 1.2 / Oct. 2007
DESCRIPTION
The Hynix HY57V281620F(L/S)TP series is a 134,217,728bit CMOS Synchronous DRAM, ideally suited for the memory
applications which require wide data I/O and high bandwidth. HY57V281620F(L/S)T(P) series is organized as 4banks
of 2,097,152 x 16.
HY57V281620F(L/S)TP is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and
outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve
very high bandwidth. All input and output voltage levels are compatible with LVTTL.
Programmable options include the length of pipeline (Read latency of 2 or 3), the number of consecutive read or write
cycles initiated by a single control command (Burst length of 1,2,4,8 or full page), and the burst count sequence(se-
quential or interleave). A burst of read or write cycles in progress can be terminated by a burst terminate command or
can be interrupted and replaced by a new burst read or write command on any cycle. (This pipelined design is not re-
stricted by a '2N' rule)
FEATURES
ORDERING INFORMATION
Note:
1. HY57V281620FTP Series: Normal power, Lead Free.
2. HY57V281620FLTP Series: Low power, Lead Free.
3. HY57V281620FLTP Series: Super Low power, Lead Free.
4. HY57V281620FST(P) Series: Super Low power; Contact Hynix for availability
5. HY57V281620F(L/S)T(P)-x: Commercial Temperature (0
6. HY57V281620F(L/S)T(P)-xI: Industrial Temperature (-40
HY57V281620F(L/S)TP-5
HY57V281620F(L/S)TP-6
HY57V281620F(L/S)TP-7
HY57V281620F(L/S)TP-H
54 Pin TSOPII (Lead Free Package)
Voltage: VDD, VDDQ 3.3V supply voltage
All device pins are compatible with LVTTL interface
All inputs and outputs referenced to positive edge of
system clock
Data mask function by UDQM, LDQM
Internal four banks operation
Auto refresh and self refresh
4096 Refresh cycles / 64ms
Part No.
Clock Frequency
200MHz
166MHz
143MHz
133MHz
o
o
C to 70
C to 85
4Banks x 2Mbits x16
Organization
o
o
C)
C)
Programmable Burst Length and Burst Type
Programmable CAS Latency; 2, 3 Clocks
Burst Read Single Write operation
Operating Temperature
- 1, 2, 4, 8 or full page for Sequential Burst
- 1, 2, 4 or 8 for Interleave Burst
- Commercial Temperature (0
- Industrial Temperature (-40
HY57V281620F(L/S)TP Series
Interface
LVTTL
o
o
C to 85
C to 70
54 Pin TSOPII
Package
o
o
C)
C)
2

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