MT90528AG ZARLINK [Zarlink Semiconductor Inc], MT90528AG Datasheet - Page 73

• Manufacturer Part Number: MT90528AG
• Description: 28-Port Primary Rate Circuit Emulation AAL1 SAR
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

classified as the occurrence of either: (i) a parity error or (ii) a CRC error AND a parity error. An uncorrectable error
occurs if a CRC error is detected without a corresponding parity error.
A brief description of the functionality is outlined below.
1. The state machine examines the AAL1 byte and checks for CRC and parity errors, based on hard-wired values
2. The type of error-processing which is performed depends upon the current state of the standardized state
Note * - When an errored SN cannot be corrected, the Correction/Detection state machine outputs the SN of the
input byte, uncorrected.
3. The most significant bit of the resulting sequence number (i.e., the CSI bit) may be processed further by the
4. At the end of cell processing, two pieces of information related to the Correction/Detection state machine are
4.6.1.4
After being processed by the Correction/Detection state machine, all AAL1 header bytes (whether correctable or
not) and their corresponding validity indicators are passed to the Fast SN Processing state machine standardized
within ITU-T I.363.1. This second portion of the Sequence Number Checking sub-module is responsible for
analyzing the received sequence number values and determining whether the cells are being received in the
correct order. The Fast Sequence Number Processing state machine can detect and compensate for lost cells. In
addition, it can compensate for events which it determines to be misinserted cells.
contained within the MT90528. The state machine then outputs two pieces of information for use by the Fast SN
Processing state machine: a validity indicator and a sequence number. The validity signal indicates whether or
not the received byte was determined to be valid (i.e., it was either correct upon arrival, or was corrected by the
Correction/Detection state machine). The sequence number is that which was determined by the Correction/
Detection machine to be the intended sequence number.
machine, either Correction or Detection:
SRTS clock recovery sub-module (see Section ) or, in the SDT case, by the pointer-processing sub-module (see
“Pointer Processing” on page 81). The 3 least significant bits are transmitted to the Fast Sequence Number Pro-
cessing state machine as the current cell’s sequence number.
updated in the Reassembly Control Structure for the VC: the next state of this state machine (either Correction
or Detection) and the AAL1 Header Errors field.
CRC Error?
CRC Error?
Yes
Yes
Yes
Yes
No
No
No
No
Sequence Number Checking (Fast SN Processing State Machine)
Table 13 - Operation of Correction/Detection State Machine in Correction State
Table 14 - Operation of Correction/Detection State Machine in Detection State
Error?
Error?
Parity
Parity
Yes
Yes
Yes
Yes
No
No
No
No
Correctable?
Correctable?
correct - no need
correct - no need
Yes
Yes
No
No
No
No
Zarlink Semiconductor Inc.
Resulting SN
Resulting SN
MT90528
SN of input byte
SN of input byte
SN of input byte
corrected SN
don’t care *
don’t care *
don’t care *
don’t care *
73
Valid?
Valid?
Yes
Yes
Yes
Yes
No
No
No
No
AAL1 Header
AAL1 Header
Error
Error
+0
+1
+1
+1
+0
+1
+1
+1
Data Sheet
Next State
Next State
Correction
Correction
Detection
Detection
Detection
Detection
Detection
Detection