ZL50020GAC ZARLINK [Zarlink Semiconductor Inc], ZL50020GAC Datasheet - Page 59
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ZL50020GAC
Manufacturer Part Number
ZL50020GAC
Description
Enhanced 2 K Digital Switch
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50020GAC.pdf
(83 pages)
- Current page: 59 of 83
- Download datasheet (683Kb)
20.3
Connection memory high provides the detailed information required for µ-law and A-law conversion. ICL and OCL
bits describe the Input Coding Law and the Output Coding Law, respectively. They are used to select the expected
PCM coding laws for the connection, on the TDM inputs, and on the TDM outputs. The V/D bit is used to select the
class of coding law. If the V/D bit is cleared (to select a voice connection), the ICL and OCL bits select between
A-law and µ-law specifications related to G.711 voice coding. If the V/D bit is set (to select a data connection), the
ICL and OCL bits select between various bit inverting protocols. These coding laws are illustrated in the following
table. If the ICL is different than the OCL, all data bytes passing through the switch on that particular connection are
translated between the indicated laws. If the ICL and the OCL are the same, no coding law translation is performed.
The ICL, the OCL bits and V/D bit only have an effect on PCM code translations for constant delay connections,
variable delay connections and per-channel message mode.
Note: For proper µ-law/A-law conversion, the CM_H bits should be set before Bit 15 (UAEN bit) is set to high.
Connection Memory High (CM_H) Bit Assignment
2 - 1
15 - 5
Bit
0
Bit
15
UA
EN
15
0
14
0
Table 33 - Connection Memory Low (CM_L) Bit Assignment when CMM = 1
14
0
PCC1 - 0
CMM = 1
Unused
Name
Name
13
0
13
0
Table 34 - Connection Memory High (CM_H) Bit Assignment
12
0
12
0
Reserved
In normal functional mode, these bits MUST be set to zero.
11
Per-Channel Control Bits
These two bits control the corresponding entry’s value on the STio stream.
Connection Memory Mode = 1
If this is high, the connection memory is in the per-channel control mode
which is per-channel tristate, per-channel message mode or per-channel BER
mode.
0
11
MSG
0
10
7
10
MSG
0
9
6
Zarlink Semiconductor Inc.
PC
9
0
C1
MSG
0
0
1
1
8
5
ZL50020
8
0
MSG
PC
C0
0
1
0
1
59
7
4
7
0
MSG
6
3
Description
Description
Channel Output Mode
Per Channel Tristate
6
0
BER Test Mode
MSG
Message Mode
5
2
Reserved
5
0
MSG
4
1
V/D
4
MSG
3
0
ICL
3
1
PCC
2
1
ICL
2
0
PCC
OCL
1
0
1
1
CMM
Data Sheet
OCL
=1
0
0
0
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