AM79C90JCTR AMD [Advanced Micro Devices], AM79C90JCTR Datasheet - Page 43

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AM79C90JCTR

Manufacturer Part Number
AM79C90JCTR
Description
CMOS Local Area Network Controller for Ethernet (C-LANCE)
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
SWITCHING WAVEFORMS
*During transmit, RENA input must be asserted (HIGH) and remain active-HIGH before TENA goes inactive (LOW). If RENA is
deasserted before TENA is deasserted, LCAR will be reported in TMD
Note:
1. RESET is an asynchronous input to the C-LANCE and is not part of the Bus Acquisition timing. When RESET is asserted, the
RESET
RENA
Drivers
TENA
TCLK
Master
HOLD
HLDA
C-LANCE becomes a Bus Slave.
TX
Bus
23
8
6
22
Serial Link Timing (Transmit)
Bus Acquisition Timing
P R E L I M I N A R Y
9
Am79C90
4
3
Drivers Enabled
after the transmission is completed by the C-LANCE.
24
3
1
5
2
*
7
21
O.D.
17881B-41
17881B-42
AMD
43

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