AM79C984AKCW AMD [Advanced Micro Devices], AM79C984AKCW Datasheet - Page 22
AM79C984AKCW
Manufacturer Part Number
AM79C984AKCW
Description
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C984AKCW.pdf
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Command/Response Timing
Figure 6 shows the command/response timing. At the
.
Control Commands
The following section details the operation of each con-
trol commands available in the eIMR device. In all
cases, the individual bits in each command are shown
with the most-significant bit (bit 7) on the left and the
least-significant bit (bit 0) on the right. Table 4 and Table
5 show a summary of default states and a summary of
control commands, respectively.
Note: Data is transmitted and received on the serial
data lines least-significant bit first and most-significant
bit last.
22
SCLK
SO
SI
ST D0 D1 D2 D3 D4 D5 D6 D7
Figure 6. Control Get Command/Response
P R E L I M I N A R Y
Am79C984A
ST D0 D1 D2 D3 D4 D5 D6 D7
end of a GET command, the eIMR device waits two
SCLK cycles and then transmits the response on SO.
eIMR Programmable Option—S Off
AUI Partitioning Algorithm
TP Partitioning Algorithm
AUI/TP Port
Link Test
Link Pulse
Automatic Receiver Polarity
Reversal
Extended Distance Mode
Blink Rate
Software Override of LEDs
Table 4. Summary of Default States after Reset
20650B-11
20650A-11
Normal
Normal
Enabled
Enabled
Enabled
State of SI at reset
Disabled
Off
Disabled
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