ZL50404GDC ZARLINK [Zarlink Semiconductor Inc], ZL50404GDC Datasheet - Page 14

• Manufacturer Part Number: ZL50404GDC
• Description: Lightly Managed/Unmanaged 5-Port 10/100M Ethernet Switch
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Ball Signal Description Table (continued)
C12
B13
B14
D11
D6
System Clock, Power, and Ground Pins
A1
D9, H4, H13, N7,
D5, D12, E4, E13, M4,
M13, N5,
G7-10, H7-10, J7-10,
K7-10
Misc.
D1
C1
F1
F2
R7
A13
Ball No(s)
TRST#
TCK
TMS
TDO
SCAN_EN
SCLK
V
V
V
RESIN#
RESETOUT#
M_MDC
M_MDIO
M_CLK
REF_CLK
DD
CC
SS
Symbol
Input
w/pull up
Input
w/pull up
Input
w/pull up
Output
Input
Must be externally
pulled-down
Input
Power
Power
Power Ground
Input
Output
Output
I/O-TS
w/ pull up
Input
Input
w/ pull up
Zarlink Semiconductor Inc.
ZL50404
I/O
14
+1.8 Volt DC Supply
+3.3 Volt DC Supply
Ground
MII Management Data Clock
JTAG - Test Reset
JTAG - Test Clock
JTAG - Test Mode State
JTAG - Test Data Out
Scan Enable. Manufacturing test option.
Should be externally pulled-down for proper
operation.
System Clock. Based on system requirement,
SCLK needs to operate at difference
frequency.
SCLK requires 40/60% duty cycle clock.
Reset Input
Reset PHY
MII Management Data I/O
RMAC Reference Clock
MMAC Reference Clock
Description
Data Sheet