AM49DL320BGB701S AMD [Advanced Micro Devices], AM49DL320BGB701S Datasheet - Page 55
AM49DL320BGB701S
Manufacturer Part Number
AM49DL320BGB701S
Description
32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit) Pseudo Static RAM
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM49DL320BGB701S.pdf
(64 pages)
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pSRAM AC CHARACTERISTICS
Read Cycle
Notes:
1. t
2. If CE#, LB#, or UB# goes low at the same time or before
54
Parameter
Symbol
the outputs achieve the open circuit condition and are
not referenced to output voltage levels.
WE# goes high, the outputs will remain at high impedance.
OD,
t
t
t
t
t
Addresses
t
t
ODO
t
t
t
ACC
t
t
COE
OEE
t
t
t
t
AOH
CO
OD
OH
PM
A0 to A20
RC
OE
BA
BE
BD
PC
AA
I/O1 to 16
LB#, UB#
t
ODo
CE#1
D
, t
WE#
OE#
CE2
OUT
BD
, and t
Description
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Data Byte Control Access Time
Chip Enable Low to Output Active
Output Enable Low to Output Active
Data Byte Control Low to Output Active
Chip Enable High to Output High-Z
Output Enable High to Output High-Z
Data Byte Control High to Output High-Z
Output Data Hold from Address Change
Page Mode Time
Page Mode Cycle Time
Page Mode Address Access Time
Page Output Data Hold Time
ODW
are defined as the time at which
High-Z
Figure 28. Psuedo SRAM Read Cycle
t
ACC
t
P R E L I M I N A R Y
COE
t
CO
t
OEE
t
t
Am49DL320BG
BE
OE
t
BA
Indeterminate
3. If CE#, LB#, or UB# goes low at the same time or after WE#
t
RC
goes low, the outputs will remain at high impedance.
Max
Max
Max
Max
Max
Max
Max
Max
Min
Min
Min
Min
Min
Min
Min
Min
Valid Data Out
70
70
70
70
Speed
t
BD
25
25
10
20
20
20
10
70
30
30
10
0
0
t
ODO
t
OD
t
OH
85
85
85
85
June 25, 2002
Fixed High
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
High-Z
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