AM49DL6408H55FS SPANSION [SPANSION], AM49DL6408H55FS Datasheet - Page 53

• Manufacturer Part Number: AM49DL6408H55FS
• Description: 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 8 Mbit (512 K x 16-Bit)
• Manufacturer: SPANSION [SPANSION]

PSEUDO SRAM AC CHARACTERISTICS
Notes:
1. CE1#s controlled.
2. t
3. t
4. t
5. A write occurs during the overlap (t
March 12, 2004
when asserting UB#s or LB#s for a single byte operation or simultaneously asserting UB#s and LB#s for a double byte operation.
A write ends at the earliest transition when CE1#s goes high and WE# goes high. The t
to the end of write.
CW
WR
AS
is measured from the address valid to the beginning of write.
is measured from CE1#s going low to the end of write.
is measured from the end of write to the address change. t
Address
CE1#s
CE2s
UB#s, LB#s
WE#
Data In
Data Out
Figure 30. Pseudo SRAM Write Cycle—CE1#s Control
A D V A N C E
WP
) of low CE1#s and low WE#. A write begins when CE1#s goes low and WE# goes low
High-Z
t
AS
(See Note 2 )
Am49DL6408H
I N F O R M A T I O N
(See Note 3)
WR
applied in case a write ends as CE1#s or WE# going high.
t
t
AW
CW
t
(See Note 5)
WC
t
BW
t
WP
t
DW
Data Valid
WP
t
is measured from the beginning of write
WR
t
DH
(See Note 4)
High-Z
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