GS88018T GSI [GSI Technology], GS88018T Datasheet - Page 20
![no-image](/images/no-image-200.jpg)
GS88018T
Manufacturer Part Number
GS88018T
Description
512K x 18, 256K x 32, 256K x 36 8Mb Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS88018T.pdf
(25 pages)
- Current page: 20 of 25
- Download datasheet (2Mb)
Rev: 1.11 8/2000
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Pipelined SCD Read-Write Cycle Timing
BW
DQ
A
A
A
ADSC
ADSP
–
–
0
BW
ADV
DQ
–
GW
BW
A
CK
E
E
E
n
G
1
2
3
D
D
Hi-Z
tS tH
tS
tS tH
tS
tS
RD1
tH
tH
tH
Single Read
tS tH
tS tH
tS
tKQ
tOE
Q1
tKH
tOHZ
E
A
2
and E
tKL
20/25
tH
3
Single Write
tKC
only sampled with ADSP and ADSC
tS tH
tS tH
tS tH
D1
WR1
WR1
A
RD2
ADSC initiated read
ADSP is blocked by E inactive
GS88018/32/36T-11/11.5/100/80/66
E
1
masks ADSP
Q2
Burst Read
A
© 2000, Giga Semiconductor, Inc.
Deselected with E
Q2
B
Preliminary
Q2c
3
Q2
D
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