GS864418 GSI [GSI Technology], GS864418 Datasheet - Page 3
GS864418
Manufacturer Part Number
GS864418
Description
4M x 18, 2M x 36, 1M x 72 72Mb S/DCD Sync Burst SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS864418.pdf
(41 pages)
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GS864472 209-Bump BGA Pin Description
Rev: 1.03 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
B
ADSP, ADSC
E
Symbol
, B
B
A
B
MCH
DQ
DQ
DQ
DQ
ADV
LBO
SCD
DQ
DQ
DQ
DQ
GW
A
NC
0
C
CK
F
ZZ
FT
E
E
E
G
, A
A
, B
, B
,B
1
3
2
A
B
C
D
E
F
G
H
D
1
B
G
,B
H
Type
I/O
—
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
Byte Write Enable for DQ
3/41
Address Strobe (Processor, Cache Controller); active low
Single Cycle Deselect/Dual Cycle Deselect Mode Control
Address field LSBs and Address Counter Preset Inputs.
Burst address counter advance enable; active low
Global Write Enable—Writes all bytes; active low
Byte Write Enable for DQ
Byte Write Enable for DQ
Flow Through or Pipeline mode; active low
Linear Burst Order mode; active low
Sleep Mode control; active high
Clock Input Signal; active high
GS864418(B/E)/GS864436(B/E)/GS864472(C)
Data Input and Output pins
Output Enable; active low
Chip Enable; active high
Chip Enable; active low
Chip Enable; active low
Must Connect High
Description
Address Inputs
No Connect
E
, DQ
C
A
F
, DQ
, DQ
, DQ
G
B
D
, DQ
I/Os; active low
I/Os; active low
H
I/Os; active low
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© 2003, GSI Technology
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