GS8320ZV18T-133 GSI [GSI Technology], GS8320ZV18T-133 Datasheet - Page 4
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GS8320ZV18T-133
Manufacturer Part Number
GS8320ZV18T-133
Description
36Mb Pipelined and Flow Through Synchronous NBT SRAMs
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS8320ZV18T-133.pdf
(23 pages)
100-Pin TQFP Pin Descriptions
Rev: 1.01 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Symbol
A
V
ADV
CKE
DQ
DQ
DQ
DQ
LBO
V
V
CK
NC
0
ZZ
B
B
B
B
FT
DDQ
W
E
E
E
G
A
, A
DD
SS
A
B
C
D
1
2
3
C
D
A
B
1
Type
I/O
I/O
I/O
I/O
—
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
In
Chip Enable; Active High. For self decoded depth expansion
Chip Enable; Active Low. For self decoded depth expansion
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
Byte Write signal for data inputs DQ
4/23
Advance/Load; Burst address counter control pin
Pipeline/Flow Through Mode Control; active low
Burst Address Inputs; Preload the burst counter
Clock Input Buffer Enable; active low
Byte C Data Input and Output pins
Byte D Data Input and Output pins
Byte A Data Input and Output pins
Byte B Data Input and Output pins
Power down control; active high
Linear Burst Order; active low
Output driver power supply
Output Enable; active low
Write Enable; active low
Chip Enable; active low
Core power supply
Clock Input Signal
Description
Address Inputs
GS8320ZV18/36T-250/225/200/166/150/133
No Connect
Ground
C1
D1
A1
B1
-DQ
-DQ
-DQ
-DQ
A9
B9
C9
D9
; active low
; active low
; active low
; active low
© 2001, GSI Technology
Preliminary