GS882Z18BB-150I GSI [GSI Technology], GS882Z18BB-150I Datasheet - Page 10
![no-image](/images/no-image-200.jpg)
GS882Z18BB-150I
Manufacturer Part Number
GS882Z18BB-150I
Description
9Mb Pipelined and Flow Through Synchronous NBT SRAM
Manufacturer
GSI [GSI Technology]
Datasheet
1.GS882Z18BB-150I.pdf
(34 pages)
- Current page: 10 of 34
- Download datasheet (614Kb)
Rev: 1.02 10/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Key
Current State (n)
Clock (CK)
Command
Intermediate
ƒ
Current State and Next State Definition for
Transition
Input Command Code
Intermediate State (N+1)
High Z
(Data In)
B W
Current State
n
D
Pipeline Mode Data I/O State Diagram
R
Transition
ƒ
Intermediate
Next State (n+2)
10/34
n+1
B
Intermediate
Intermediate
Intermediate
D
W
State
High Z
ƒ
R
Pipeline Mode Data I/O State Diagram
Intermediate
Notes
1. The Hold command (CKE Low) is not
2. W, R, B, and D represent input command
codes as indicated in the Truth Tables.
shown because it prevents any state change.
n+2
GS882Z18/36BB/D-333/300/250/200/150
Next State
W
ƒ
D
Data Out
(Q Valid)
R
n+3
B
Intermediate
ƒ
© 2001, GSI Technology
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