LIS3LV02DL_08 STMICROELECTRONICS [STMicroelectronics], LIS3LV02DL_08 Datasheet - Page 22

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LIS3LV02DL_08

Manufacturer Part Number
LIS3LV02DL_08
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Digital interfaces
5
5.1
22/48
Digital interfaces
The registers embedded inside the LIS3LV02DL may be accessed through both the I
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I
line must be tied high (i.e connected to Vdd_IO).
Table 9.
I
The LIS3LV02DL I
whose content can also be read back.
The relevant I
Table 10.
There are two signals associated with the I
Serial DAta line (SDA). The latter is a bidirectional line used for sending and receiving the
data to/from the interface. Both the lines are connected to Vdd_IO through a pull-up resistor
embedded inside the LIS3LV02DL. When the bus is free both the lines are high.
The I
Normal Mode.
2
C serial interface
SDA/SDI/SDO
Transmitter
Pin name
SCL/SPC
2
Receiver
Master
C interface is compliant with Fast Mode (400 kHz) I
Slave
Term
SDO
CS
Serial interface pin description
Serial interface pin description
2
C terminology is given in the table below.
2
SPI enable
I
I
SPI Serial Port Clock (SPC)
I
SPI Serial Data Input (SDI)
3-wire Interface Serial Data Output (SDO)
SPI Serial Data Output (SDO)
The device which sends data to the bus
The device which receives data from the bus
The device which initiates a transfer, generates clock signals and terminates a
transfer
The device addressed by the master
C is a bus slave. The I
2
2
2
C/SPI mode selection (1: I
C Serial Clock (SCL)
C Serial Data (SDA)
2
C is employed to write the data into the registers
2
C bus: the Serial Clock Line (SCL) and the
2
C mode; 0: SPI enabled)
Pin description
Description
2
C standards as well as the
2
C interface, CS
LIS3LV02DL
2
C and

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