LIS3LV02DL_08 STMICROELECTRONICS [STMicroelectronics], LIS3LV02DL_08 Datasheet - Page 38

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LIS3LV02DL_08

Manufacturer Part Number
LIS3LV02DL_08
Description
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Register description
7.21
7.22
7.23
38/48
Table 53.
FF_WU_ACK (32h)
Dummy register. If LIR bit in FF_WU_CFG register is set to ‘1’, a reading at this address
allows the FF_WU_SRC register refresh. Read data is not significant.
FF_WU_THS_L (34h)
Table 54.
Table 55.
FF_WU_THS_H (35h)
Table 56.
Table 57.
IA
ZH
ZL
YH
YL
XH
XL
THS7, THS0
THS15, THS8
THS15
THS7
Register description (31h)
Register (34h)
Register description (34h)
Register (35h)
Register description (35h)
THS14
THS6
Interrupt Active. Default value: 0
(0: no interrupt has been generated;
1: one or more interrupt events have been generated)
Z High. Default value: 0
(0: no interrupt; 1: Z High event has occurred)
Z Low. Default value: 0
(0: no interrupt; 1: Z Low event has occurred)
Y High. Default value: 0
(0: no interrupt; 1: Y High event has occurred)
Y Low. Default value: 0
(0: no interrupt; 1: Y Low event has occurred)
X High. Default value: 0
(0: no interrupt; 1: X High event has occurred)
X Low. Default value: 0
(0: no interrupt; 1: X Low event has occurred)
Free-fall / Inertial Wake Up Acceleration Threshold LSB
Free-fall / Inertial Wake Up Acceleration Threshold MSB
THS13
THS5
THS12
THS4
THS11
THS3
THS10
THS2
THS1
THS9
LIS3LV02DL
THS0
THS8

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