LC89057W-VF4A-E SANYO [Sanyo Semicon Device], LC89057W-VF4A-E Datasheet - Page 36

• Manufacturer Part Number: LC89057W-VF4A-E
• Description: Digital Audio Interface Transceiver
• Manufacturer: SANYO [Sanyo Semicon Device]

12.1.3 Data write procedure
•
•
12.1.4 Data read procedure
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•
12.1.5 I/O timing
DI1, command addresses of DI4 to DI7, and data of DI8 to DI15. DI2 and DI3 are reserved for the system. Input must
be doing "0".
Input is performed in the following sequence: CCB addresses of A0 to A3 and B0 to B3, chip addresses of DI0 and
For the chip addresses, DI0 corresponds to CAL (low-order), and DI1 to CAU (high-order). For details, see section 9.2.
Read data is output from DO. DO is in the high impedance state when CE is "L", and begins outputting from the rising
If DO outputs are shared using multiple LC89057W-VF4A-E units, it is possible to set the DO outputs of the
edge of CE after output setting is established at the CCB address. DO then returns to the high impedance state at the
falling edge of CE.
LC89057W-VF4A-E units of which data is not to be read to be always in the high impedance state with DOEN. With
this setting, only the targeted outputs can be read.
DO
DO
DO
DO
CE
CE
CE
CE
CL
CL
CL
CL
DI
DI
DI
DI
Figure 12.4 Output Timing Chart (Normal H clock, DO0 need be read with port)
B0
B0
B0
B0
B1
B1
B1
B1
Hi-Z
Hi-Z
Hi-Z
Hi-Z
B2
B2
B2
B2
Figure 12.3 Output Timing Chart (Normal L clock)
Figure 12.2 Input Timing Chart (Normal H clock)
Figure 12.1 Input Timing Chart (Normal L clock)
B3
B3
B3
B3
A0
A0
A0
A0
LC89057W-VF4A-E
A1
A1
A1
A1
A2
A2
A2
A2
A3
A3
A3
A3
DO0
DI0
DO0
DO1 DO2 DO3 DO4
DI0
DO1 DO2 DO3 DO4
DI1 DI2 DI3 DI4 DI5
DI1 DI2 DI3 DI4 DI5
…
…
…
… DI15
…
…
…
DOn
DOn
DI15
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