LC89075W-H SANYO [Sanyo Semicon Device], LC89075W-H Datasheet - Page 36
LC89075W-H
Manufacturer Part Number
LC89075W-H
Description
Digital Audio Interface Receiver with Stereo ADC and Audio Selector
Manufacturer
SANYO [Sanyo Semicon Device]
Datasheet
1.LC89075W-H.pdf
(69 pages)
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• The format of the audio data input to DATAIN, MPIN4, MPIO4 and RXIN5 should match the ADC and DIR output
• The DIR demodulated data and clocks are not output from MPOUT[4:1].
000
(Mute output)
001
010
011
100
(“MPSEL[1:0]=01”)
101
110
111
1
data format (DAFORM register setting).
SW2SEL
FLGOUT
Register
Register
Table 11.2 Clock and Data Input/Output Configuration in 2-channel Data Selector Setting
Table 11.3 External Flag Input/Output Configuration in 2-channel Data Selector Setting
(MPOUT1, MPOUT2, MPOUT3, and MPOUT4 output pins)
-
S/PDIF input
ADC-MCK
ADC-BCK
ADC-LRCK
ADC-DATA
MCKIN (3)
BCKIN (4)
LRCKIN (5)
DATAIN (6)
MPIN1 (7)
MPIN2 (8)
MPIN3 (9)
MPIN4 (10)
MPIO1 (26)
MPIO2 (27)
MPIO3 (28)
MPIO4 (29)
RXIN8 (56)
RXIN7 (57)
RXIN6 (58)
RXIN5 (59)
For 6ch data process (See 11.2)
For 8ch data process (See 11.3)
MPIN5 (11)
MPIN6 (12)
Selector Input
Selector Input
(MUTEB and NPCMF output pins)
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
→
LC89075W-H
MPOUT1 (19)
MPOUT2 (20)
MPOUT3 (21)
MPOUT4 (22)
MPOUT1 (19)
MPOUT2 (20)
MPOUT3 (21)
MPOUT4 (22)
MPOUT1 (19)
MPOUT2 (20)
MPOUT3 (21)
MPOUT4 (22)
MPOUT1 (19)
MPOUT2 (20)
MPOUT3 (21)
MPOUT4 (22)
MPOUT1 (19)
MPOUT2 (20)
MPOUT3 (21)
MPOUT4 (22)
MPOUT1 (19)
MPOUT2 (20)
MPOUT3 (21)
MPOUT4 (22)
MUTEB (24)
NPCMF (25)
Selector Output
Selector Output
"L" output
"L" output
"L" output
Input S/PDIF select output
Master clock output
Bit clock output
LR clock output
2ch data output
Master clock input/output
Bit clock input/output
LR clock or DSD data input/output
2ch data or DSD data input/output
Master clock input/output
Bit clock input/output
LR clock or DSD data input/output
2ch data or DSD data input/output
Master clock input/output
Bit clock input/output
LR clock or DSD data input/output
2ch data or DSD data input/output
Master clock input/output
Bit clock input/output
LR clock or DSD data input/output
2ch data or DSD data input/output
Mute flag
Non-PCM flag
I/O Contents
I/O Contents
No.A1858-36/69
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