CH7007A-V ETC, CH7007A-V Datasheet - Page 4

• Manufacturer Part Number: CH7007A-V
• Description: DIGITAL PC TO TV ENCODER WITH MACROVISION
• Manufacturer: ETC

CHRONTEL
4
Table 1. Pin Descriptions
13,15-19
6-10,12-
44-Pin
PLCC
20-21
27
23
26
28
30
1
2
3
4
5
44,1-4,6-
44-Pin
TQFP
7,9-13
14-15
39
40
41
42
43
17
20
21
22
24
In/Out
In/Out
In/Out
In/Out
Type
Out
Out
Out
Out
In
In
In
In
D[0]-D[11]
Symbol
GPIO[0]
GPIO[1]
CVBS/B
CSYNC
XCLK*
VREF
XCLK
ISET
Y/R
C/G
H
V
Reference Voltage Input
The VREF pin inputs a reference voltage of DVDD2/2. The signal is
derived externally through a resistor divider and decoupling capacitor,
and will be used as a reference level for data and sync inputs.
External Clock Input
This input along with XCLK* will form a differential clock input. For
applications where a differential clock is not available, the XCLK* pin
should be connected to the VREF pin.
External Clock Input*
See XCLK description
Horizontal Sync Input/Output
When the SYO bit is low, this pin accepts a horizontal sync input. The
level is 0 to DVDD2, with VREF as the threshold level.
When the SYO bit is high, the device will output a horizontal sync pulse.
The output is driven from the DVDD supply.
Vertical Sync Input/Output
When the SYO bit is low, this pin accepts a vertical sync input. The level
is 0 to DVDD2 with VREF as the threshold level.
When the SYO bit is high, the device will output a vertical sync pulse.
The output is driven from the DVDD supply.
Data [0] through Data [11] Inputs
These pins accept 12 data inputs from the graphics controller. The level
is 0 to DVDD2, with VREF as the threshold level.
General Purpose Input/Output [0-1] and Internal pull-up
These pins provide general purpose I/O’s controlled via the IIC bus,
registers 1Bh and 1Ch, bits 7 and 6. The internal pull-up is to the DVDD
supply.
Composite Sync Output
A 75
between CSYNC and ground for optimum performance. In SCART
mode, this pin outputs the composite sync signal.
Composite Video Output/Blue Output
A 75
between CVBS and ground for optimum performance. In normal
operating modes other than SCART, this pin outputs the composite
video signal. In SCART mode, this pin outputs the blue signal.
Chroma Output/Green Output
A 75
between C and ground for optimum performance.
modes other than SCART, this pin outputs the chroma video signal. In
SCART mode, this pin outputs the green signal.
Luma Output / Red Output
A 75
between Y and ground for optimum performance.
modes other than SCART, this pin outputs the luma video signal. In
SCART mode, this pin outputs the red signal.
Current Set Resistor Input
This pin sets the DAC current. A 360 ohm resistor should be
connected between this pin and GND using short and wide traces.
termination resistor with short traces should be attached
termination resistor with short traces should be attached
termination resistor with short traces should be attached
termination resistor with short traces should be attached
Description
201-0000-002 Rev. 2.7, 08/23/2000
In normal operating
In normal operating
CH7007A