MT47H32M16HR-25E AIT:G Micron, MT47H32M16HR-25E AIT:G Datasheet - Page 53

• Manufacturer Part Number: MT47H32M16HR-25E AIT:G
• Description: DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA
• Manufacturer: Micron

Input Slew Rate Derating
PDF: 09005aef8440dbbc
512mbddr2_ait_aat.pdf – Rev. C 7/11 EN
For all input signals, the total
by adding the data sheet
value, respectively. Example:
t
crossing of V
a falling signal is defined as the slew rate between the last crossing of V
first crossing of V
If the actual signal is always earlier than the nominal slew rate line between shaded
“V
(page 56)).
If the actual signal is later than the nominal slew rate line anywhere between the shaded
“V
level to DC level is used for the derating value (see Figure 22 (page 56)).
t
crossing of V
ing signal, is defined as the slew rate between the last crossing of V
crossing of V
If the actual signal is always later than the nominal slew rate line between shaded “DC
to V
(page 57)).
If the actual signal is earlier than the nominal slew rate line anywhere between shaded
“DC to V
level to V
Although the total setup time might be negative for slow slew rates (a valid input signal
will not have reached V
put signal is still required to complete the transition and reach V
For slew rates in between the values listed in Table 28 (page 54) and Table 29
(page 55), the derating values may obtained by linear interpolation.
IS, the nominal slew rate for a rising signal, is defined as the slew rate between the last
IH, the nominal slew rate for a rising signal, is defined as the slew rate between the last
REF(DC)
REF(DC)
REF(DC)
REF(DC)
REF(DC)
to AC region,” use the nominal slew rate for the derating value (Figure 21
to AC region,” the slew rate of a tangent line to the actual signal from the AC
region,” use the nominal slew rate for the derating value (Figure 23
Micron Confidential and Proprietary
REF(DC)
IL(DC)max
REF(DC)
region,” the slew rate of a tangent line to the actual signal from the DC
level is used for the derating value (Figure 24 (page 57)).
IL(AC)max
.
and the first crossing of V
and the first crossing of V
IH[AC]
t
.
IS (base) and
/V
t
53
t
IS (total setup time) =
IS (setup time) and
512Mb: x8, x16 Automotive DDR2 SDRAM
IL[AC]
at the time of the rising clock transition), a valid in-
t
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IH (base) value to the
IH(AC)min
REF(DC)
t
IH (hold time) required is calculated
t
IS (base) +
Input Slew Rate Derating
. Setup nominal slew rate (
.
t
IH, nominal slew rate for a fall-
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t
IS and
IH(AC)
t
IS.
IH(DC)min
/V
REF(DC)
IL(AC)
t
IH derating
and the first
.
and the
t
IS) for