MT47H32M16HR-25E AIT:G Micron, MT47H32M16HR-25E AIT:G Datasheet - Page 96
MT47H32M16HR-25E AIT:G
Manufacturer Part Number
MT47H32M16HR-25E AIT:G
Description
DRAM Chip DDR2 SDRAM 512M-Bit 32Mx16 1.8V 84-Pin FBGA
Manufacturer
Micron
Datasheet
1.MT47H64M8CF-25E_ITG.pdf
(129 pages)
- Current page: 96 of 129
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Figure 51: Bank Read – with Auto Precharge
PDF: 09005aef8440dbbc
512mbddr2_ait_aat.pdf – Rev. C 7/11 EN
Bank address
Command 1
DQS, DQS#
DQS, DQS#
Case 2: t AC (MAX) and t DQSCK (MAX)
Case 1: t AC (MIN) and t DQSCK (MIN)
Address
DQ 6
DQ 6
CK#
CKE
A10
DM
CK
NOP 1
T0
Notes:
Bank x
ACT
RA
T1
RA
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4, RL = 4 (AL = 1, CL = 3) in the case shown.
3. The DDR2 SDRAM internally delays auto precharge until both
4. Enable auto precharge.
5. I/O balls, when entering or exiting High-Z, are not referenced to a specific voltage level,
6. DO n = data-out from column n; subsequent elements are applied in the programmed
t CK
these times.
have been satisfied.
but to when the device begins to drive or no longer drives, respectively.
order.
t RCD
t RAS
t RC
NOP 1
T2
Micron Confidential and Proprietary
t CH
t CL
READ 2,3
Bank x
Col n
4
T3
AL = 1
prefetch
4-bit
NOP 1
96
T4
512Mb: x8, x16 Automotive DDR2 SDRAM
t RTP
NOP 1
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T5
t LZ (MIN)
t LZ (MAX)
CL = 3
Internal
precharge
NOP 1
5
T6
5
t RPRE
t LZ (MIN)
t LZ (MAX)
t RPRE
NOP 1
Transitioning Data
T7
t DQSCK (MIN)
t RP
DO
t DQSCK (MAX)
t AC (MIN)
n
t AC (MAX)
DO
2010 Micron Technology, Inc. All rights reserved.
n
T7n
t
RAS (MIN) and
NOP 1
T8
t HZ (MIN)
t HZ (MAX)
T8n
t RPST
t RPST
Don’t Care
Bank x
ACT
RA
5
RA
t
RTP (MIN)
5
READ
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