PCA2129T/Q900/2,51 NXP Semiconductors, PCA2129T/Q900/2,51 Datasheet - Page 30

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PCA2129T/Q900/2,51

Manufacturer Part Number
PCA2129T/Q900/2,51
Description
Real Time Clock
Manufacturer
NXP Semiconductors
Series
PCA2129r
Datasheet

Specifications of PCA2129T/Q900/2,51

Rohs
yes
Function
Clock, Calendar, Alarm, Watchdog, Timestamp
Rtc Bus Interface
I2C, SPI
Date Format
Binary
Time Format
Binary
Supply Voltage - Max
4.2 V
Supply Voltage - Min
1.8 V
Maximum Operating Temperature
+ 80 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Package / Case
SOP-16
Battery Backup Switching
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA2129T/Q900/2,51
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCA2129T
Product data sheet
8.10.1 Register Watchdg_tim_ctl
8.10.2 Register Watchdg_tim_val
8.10 Timer functions
The PCA2129T has a watchdog timer function. The timer can be switched on and off by
using the control bit WD_CD in the register Watchdg_tim_ctl.
The watchdog timer has four selectable source clocks. It can, for example, be used to
detect a microcontroller with interrupt and reset capability which is out of control (see
Section
To control the timer function and timer output, the registers Control_2, Watchdg_tim_ctl,
and Watchdg_tim_val are used.
Table 31.
[1]
[2]
Table 32.
Bit
7
6
5
4 to 2 -
1 to 0 TF[1:0]
Bit
7 to 0 WATCHDG_TIM_VAL[7:0]
Default value.
When writing to the register this bit always has to be set logic 0.
Symbol
WD_CD
T
TI_TP
Symbol
8.10.3)
Watchdg_tim_ctl - watchdog timer control register (address 10h) bit description
Watchdg_tim_val - watchdog timer value register (address 11h) bit description
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 24 January 2013
Accurate RTC with integrated quartz crystal for automotive
Value
0
1
0
0
1
-
00
01
10
11
[1]
[2]
[1]
[1]
Value
00 to FF timer period in seconds:
Description
watchdog timer disabled
watchdog timer enabled;
unused
the interrupt pin INT is configured to generate a
permanent active signal when MSF (register Control_2)
is set
the interrupt pin INT is configured to generate a pulsed
signal when MSF flag is set (see
unused
timer source clock for watchdog timer
the interrupt pin INT is activated when timed out
4.096 kHz
64 Hz
1 Hz
1
60
Hz
Description
where n is the timer value
TimerPeriod
=
-------------------------------------------------------------- -
SourceClockFrequency
PCA2129T
Figure
n
© NXP B.V. 2013. All rights reserved.
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