PCA2129T/Q900/2,51 NXP Semiconductors, PCA2129T/Q900/2,51 Datasheet - Page 48

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PCA2129T/Q900/2,51

Manufacturer Part Number
PCA2129T/Q900/2,51
Description
Real Time Clock
Manufacturer
NXP Semiconductors
Series
PCA2129r
Datasheet

Specifications of PCA2129T/Q900/2,51

Rohs
yes
Function
Clock, Calendar, Alarm, Watchdog, Timestamp
Rtc Bus Interface
I2C, SPI
Date Format
Binary
Time Format
Binary
Supply Voltage - Max
4.2 V
Supply Voltage - Min
1.8 V
Maximum Operating Temperature
+ 80 C
Minimum Operating Temperature
- 30 C
Mounting Style
SMD/SMT
Package / Case
SOP-16
Battery Backup Switching
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCA2129T/Q900/2,51
Manufacturer:
NXP/恩智浦
Quantity:
20 000
NXP Semiconductors
PCA2129T
Product data sheet
9.2.1 Bit transfer
9.2.2 START and STOP conditions
9.2.3 System configuration
9.2 I
The I
The two lines are a Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines are
connected to a positive supply by a pull-up resistor. Data transfer is initiated only when the
bus is not busy.
One data bit is transferred during each clock pulse. The data on the SDA line remains
stable during the HIGH period of the clock pulse as changes in the data line at this time
are interpreted as control signals (see
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line, while the clock is HIGH, is defined as the START condition S.
A LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition P (see
Remark: For the PCA2129T, a repeated START is not allowed. Therefore a STOP has to
be released before the next START.
A device generating a message is a transmitter; a device receiving a message is the
receiver. The device that controls the message is the master; and the devices which are
controlled by the master are the slaves.
The PCA2129T can act as a slave transmitter and a slave receiver.
2
Fig 31. Bit transfer
Fig 32. Definition of START and STOP conditions
C-bus interface
2
C-bus is for bidirectional, two-line communication between different ICs or modules.
SDA
SCL
START condition
All information provided in this document is subject to legal disclaimers.
Figure
SDA
SCL
S
Rev. 3 — 24 January 2013
32).
Accurate RTC with integrated quartz crystal for automotive
data valid
data line
stable;
Figure
31).
allowed
change
of data
STOP condition
PCA2129T
mbc621
P
© NXP B.V. 2013. All rights reserved.
mbc622
SDA
SCL
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