GTL2014PW,112 NXP Semiconductors, GTL2014PW,112 Datasheet - Page 3

IC TXRX 4BIT LVTTL/GTL 14TSSOP

GTL2014PW,112

Manufacturer Part Number
GTL2014PW,112
Description
IC TXRX 4BIT LVTTL/GTL 14TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of GTL2014PW,112

Logic Type
LVTTL-TO-GTL/GTL+ TRANSCEIVER
Package / Case
14-TSSOP
Logic Function
*
Number Of Bits
4
Input Type
*
Output Type
*
Data Rate
*
Number Of Channels
*
Number Of Outputs/channel
*
Differential - Input:output
*
Propagation Delay (max)
*
Voltage - Supply
3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Supply Voltage
3 V ~ 3.6 V
Logic Family
GTL
Number Of Channels Per Chip
4
Input Level
LVTTL
Output Level
GTL
High Level Output Current
- 32 mA
Low Level Output Current
32 mA
Propagation Delay Time
2.8 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
3 V
Maximum Operating Temperature
+ 85 C
Function
Bus Transceiver
Input Bias Current (max)
10000 uA
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Polarity
Non-Inverting
Number Of Circuits
4
Operating Supply Voltage (typ)
3.3V
Number Of Elements
1
Input Logic Level
LVTTL/TTL
Output Logic Level
GTL
Package Type
TSSOP
Logical Function
Bus Transceiver
Operating Supply Voltage (min)
3V
Quiescent Current (typ)
4mA
Technology
BiCMOS
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
14
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-3066-5
935277499112
GTL2014PW
Philips Semiconductors
6. Pinning information
7. Functional description
9397 750 13534
Product data sheet
6.1 Pinning
6.2 Pin description
7.1 Function table
Table 4:
Refer to
Table 5:
H = HIGH voltage level; L = LOW voltage level.
Symbol
DIR
B0
B1
B2
B3
A0
A1
A2
A3
VREF
GND
V
Input
DIR
H
L
Fig 2. Pin configuration for TSSOP14
CC
Figure 1 “Logic diagram for GTL2014” on page
Pin description
Function table
Pin
1
2
3
5
6
13
12
10
9
4
7, 8, 11
14
Rev. 01 — 19 May 2005
VREF
GND
DIR
B0
B1
B2
B3
Input/output
A (LVTTL)
input
An = Bn
1
2
3
4
5
6
7
Description
direction control input (LVTTL)
data inputs/outputs (GTL)
data inputs/outputs (LVTTL)
GTL reference voltage
ground (0 V)
positive supply voltage
GTL2014PW
002aab138
14
13
12
11
10
9
8
2.
4-bit LVTTL to GTL transceiver
V
A0
A1
GND
A2
A3
GND
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
CC
B (GTL)
Bn = An
input
GTL2014
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