dsPIC33FJ32GP102-I/SO Microchip Technology, dsPIC33FJ32GP102-I/SO Datasheet - Page 163

• Manufacturer Part Number: dsPIC33FJ32GP102-I/SO
• Description: Digital Signal Processors & Controllers - DSP, DSC 16bit Gen Prp Fam16 MIPS 32KBFLSH 2KBRAM
• Manufacturer: Microchip Technology
• Type: dsPIC33FJ32(GP/MC)101/102/104r

Specifications of dsPIC33FJ32GP102-I/SO

• Rohs: yes
• Core: dsPIC33F
• Data Bus Width: 16 bit
• Program Memory Size: 32 KB
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 7.37 MHz, 32 kHz
• Number Of Programmable I/os: 21
• Number Of Timers: 5 x 16-bit, 2 x 32-bit
• Device Million Instructions Per Second: 16 MIPs
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Package / Case: QFN-28
• Mounting Style: SMD/SMT
• Family / Core: dsPIC33FJ32(GP/MC)101/102/104
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: Yes
• Product: DSPs
• Program Memory Type: Flash
• Supply Current: 10 mA

11.0
The Timer1 module is a 16-bit timer, which can serve
as the time counter for the Real-Time Clock (RTC) or
operate as a free-running interval timer/counter. Timer1
can operate in three modes:
• 16-bit Timer
• 16-bit Synchronous Counter
• 16-bit Asynchronous Counter
FIGURE 11-1:
 2011-2012 Microchip Technology Inc.
Note 1: This data sheet summarizes the features
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
2: Some registers and associated bits
TIMER1
of
and dsPIC33FJ32(GP/MC)101/102/104
family devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to Section 11. “Timers”
(DS70205) in the “dsPIC33F/PIC24H
Family Reference Manual”, which is
available from the Microchip web site
(www.microchip.com).
described in this section may not be
available on all devices. Refer to
Section 4.0 “Memory Organization”
this data sheet for device-specific register
and bit information.
SOSCO/
Set T1IF
SOSCI
T1CK
the
dsPIC33FJ16(GP/MC)101/102
16-BIT TIMER1 MODULE BLOCK DIAGRAM
TGATE
1
0
Reset
Equal
SOSCEN
Comparator
TMR1
PR1
in
Q
Q
Gate
Sync
CK
T
CY
D
Timer1 also supports these features:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during CPU Idle and Sleep modes
• Interrupt on 16-bit Period register match or falling
Figure 11-1
module.
To configure Timer1 for operation:
1.
2.
3.
4.
5.
6.
7.
edge of external gate signal
Load the timer value into the TMR1 register.
Load the timer period value into the PR1
register.
Select the timer prescaler ratio using the
TCKPS<1:0> bits in the T1CON register.
Set the Clock and Gating modes using the TCS
and TGATE bits in the T1CON register.
Set or clear the TSYNC bit in T1CON to select
synchronous or asynchronous operation.
If interrupts are required, set the Timer1 Inter-
rupt Enable bit, T1IE. Use the Timer1 Interrupt
Priority bits, T1IP<2:0>, to set the interrupt
priority.
Set the TON bit (= 1) in the T1CON register.
presents a block diagram of the 16-bit timer
TSYNC
1x
01
00
0
1
TON
TGATE
TCS
Sync
TCKPS<1:0>
1, 8, 64, 256
Prescaler
2
DS70652E-page 163