LCMXO640E-5FN256C Lattice, LCMXO640E-5FN256C Datasheet - Page 21

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LCMXO640E-5FN256C

Manufacturer Part Number
LCMXO640E-5FN256C
Description
CPLD - Complex Programmable Logic Devices Use LCMXO640E-5FTN25
Manufacturer
Lattice
Datasheet

Specifications of LCMXO640E-5FN256C

Rohs
yes
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
600 MHz
Delay Time
3.5 ns
Number Of Programmable I/os
159
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
14 mA
Supply Voltage - Max
1.26 V
Supply Voltage - Min
1.14 V
Lattice Semiconductor
Table 2-10. Supported Output Standards
sysIO Buffer Banks
The number of Banks vary between the devices of this family. Eight Banks surround the two larger devices, the
MachXO1200 and MachXO2280 (two Banks per side). The MachXO640 has four Banks (one Bank per side). The
smallest member of this family, the MachXO256, has only two Banks.
Each sysIO buffer Bank is capable of supporting multiple I/O standards. Each Bank has its own I/O supply voltage
(V
and Figure 2-21 shows the sysIO Banks and their associated supplies for all devices.
CCIO
) which allows it to be completely independent from the other Banks. Figure 2-18, Figure 2-18, Figure 2-20
Single-ended Interfaces
LVTTL
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVCMOS33, Open Drain
LVCMOS25, Open Drain
LVCMOS18, Open Drain
LVCMOS15, Open Drain
LVCMOS12, Open Drain
PCI33
Differential Interfaces
LVDS
BLVDS, RSDS
LVPECL
1. MachXO1200 and MachXO2280 devices have dedicated LVDS buffers.
2. These interfaces can be emulated with external resistors in all devices.
3. Top Banks of MachXO1200 and MachXO2280 devices only.
1, 2
3
2
Output Standard
2
2-18
4mA, 8mA, 12mA, 16mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA, 12mA, 14mA
4mA, 8mA
2mA, 6mA
4mA, 8mA
2mA, 6mA
Drive
N/A
N/A
N/A
N/A
MachXO Family Data Sheet
V
CCIO
3.3
3.3
2.5
1.8
1.5
1.2
3.3
2.5
2.5
3.3
(Typ.)
Architecture

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