LCMXO640E-5FN256C Lattice, LCMXO640E-5FN256C Datasheet - Page 81

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LCMXO640E-5FN256C

Manufacturer Part Number
LCMXO640E-5FN256C
Description
CPLD - Complex Programmable Logic Devices Use LCMXO640E-5FTN25
Manufacturer
Lattice
Datasheet

Specifications of LCMXO640E-5FN256C

Rohs
yes
Memory Type
SRAM
Number Of Macrocells
320
Maximum Operating Frequency
600 MHz
Delay Time
3.5 ns
Number Of Programmable I/os
159
Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Package / Case
FPBGA
Mounting Style
SMD/SMT
Factory Pack Quantity
450
Supply Current
14 mA
Supply Voltage - Max
1.26 V
Supply Voltage - Min
1.14 V
Lattice Semiconductor
Thermal Management
Thermal management is recommended as part of any sound FPGA design methodology. To assess the thermal
characteristics of a system, Lattice specifies a maximum allowable junction temperature in all device data sheets.
Designers must complete a thermal analysis of their specific design to ensure that the device and package do not
exceed the junction temperature limits. Refer to the
specific thermal values.
For Further Information
For further information regarding Thermal Management, refer to the following:
• TN1090 -
• Power Calculator tool included with the Lattice ispLEVER design tool, or as a standalone download from 
Thermal Management
www.latticesemi.com/software
Power Estimation and Management for MachXO Devices
document
Thermal Management
4-36
document to find the device/package
MachXO Family Data Sheet
Pinout Information

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