MAX1301BEUP+CAL Maxim Integrated, MAX1301BEUP+CAL Datasheet - Page 26

• Manufacturer Part Number: MAX1301BEUP+CAL
• Description: Analog to Digital Converters - ADC Intel R2 Customer special for MAX1301BEUP+
• Manufacturer: Maxim Integrated

Specifications of MAX1301BEUP+CAL

• Number Of Channels: 4/2
• Architecture: SAR
• Conversion Rate: 130 KSPs
• Input Type: Single-Ended/Differential
• Operating Supply Voltage: 4.75 V to 5.25 V
• Maximum Power Dissipation: 879 mW
• Number Of Converters: 1

The MAX1300/MAX1301 convert 1kHz signals more
accurately than a similar sigma-delta converter that
might be considered in bridge applications. The input
impedance of the MAX1300, in combination with the cur-
rent-limiting resistors, can affect the gain of the
MAX1300. In many applications this error is acceptable,
but for applications that cannot tolerate this error, the
MAX1300 inputs can be buffered (Figure 20). Connect
the bridge to a low-offset differential amplifier and then
the true-differential inputs of the MAX1300/MAX1301.
Larger excitation voltages take advantage of more of the
(±3 x V
input voltage range that matches the amplifier output. Be
aware of the amplifier offset and offset-drift errors when
selecting an appropriate amplifier.
Software control of each channel’s analog input range
and the unipolar endpoint overlap specification make it
possible for the user to change the input range for a
channel dynamically and improve performance in some
applications. Changing the input range results in a
small LSB step-size over a wider output voltage range.
For example, by switching between a (-3 x V
0V range and a 0 to (+3 x V
but the input voltage range effectively spans from
(-3 x V
8- and 4-Channel, ±3 x V
Serial 16-Bit ADCs
Figure 18. External Reference Operation
26
______________________________________________________________________________________
Dynamically Adjusting the Input Range
REF
REF
)/2 to (+3 x V
)/4 differential input voltage range. Select an
(
+ ×
3
65 536 4 096
REF
,
V
MAX1300
MAX1301
REF
ADC REF
SAR
)/2 (FSR = 3 x V
REF
×
REFERENCE
)
BANDGAP
2
.
4.096V
)/2 range, an LSB is
×
Bridge Application
V
5kΩ
REF
4.096V
1x
REF
).
REF
)/2 to
V
REFCAP
RCTH
AGND1
REF
REF
Careful PC board layout is essential for best system per-
formance. Boards should have separate analog and
digital ground planes and ensure that digital and analog
signals are separated from each other. Do not run ana-
log and digital (especially clock) lines parallel to one
another, or digital lines underneath the device package.
Figure 1 shows the recommended system ground con-
nections. Establish an analog ground point at AGND1
and a digital ground point at DGND. Connect all analog
grounds to the star analog ground. Connect the digital
grounds to the star digital ground. Connect the digital
ground plane to the analog ground plane at one point.
For lowest noise operation, make the ground return to
the star ground’s power-supply low impedance and as
short as possible.
High-frequency noise in the AVDD1 power supply
degrades the ADC’s high-speed comparator perfor-
mance. Bypass AVDD1 to AGND1 with a 0.1µF ceramic
surface-mount capacitor. Make bypass capacitor con-
nections as short as possible.
INL is the deviation of the values on an actual transfer
function from a straight line. This straight line is either a
best straight-line fit or a line drawn between the end-
points of the transfer function once offset and gain
errors have been nullified. The MAX1300/MAX1301 INL
is measured using the endpoint method.
AV
DD1
Multirange Inputs,
1.0µF
Layout, Grounding, and Bypassing
OUT
MAX6341
GND
V+
IN
Parameter Definitions
Integral Nonlinearity (INL)
1.0µF