MAX1301BEUP+CAL Maxim Integrated, MAX1301BEUP+CAL Datasheet - Page 29

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MAX1301BEUP+CAL

Manufacturer Part Number
MAX1301BEUP+CAL
Description
Analog to Digital Converters - ADC Intel R2 Customer special for MAX1301BEUP+
Manufacturer
Maxim Integrated
Datasheet

Specifications of MAX1301BEUP+CAL

Number Of Channels
4/2
Architecture
SAR
Conversion Rate
130 KSPs
Input Type
Single-Ended/Differential
Operating Supply Voltage
4.75 V to 5.25 V
Maximum Power Dissipation
879 mW
Number Of Converters
1
ENOB indicates the global accuracy of an ADC at a
specific input frequency and sampling rate. With an
input range equal to the ADC’s full-scale range, calcu-
late the ENOB as follows:
For the MAX1300/MAX1301, THD is the ratio of the
RMS sum of the input signal’s first four harmonic com-
ponents to the fundamental itself. This is expressed as:
where V
V
harmonic components.
SFDR is the ratio of RMS amplitude of the fundamental
(maximum signal component) to the RMS value of the
next-largest spectral component.
5
THD
8- and 4-Channel, ±3 x V
are the amplitudes of the 2nd- through 5th-order
Spurious-Free Dynamic Range (SFDR)
1
=
is the fundamental amplitude, and V
20
Effective Number of Bits (ENOB)
Total Harmonic Distortion (THD)
×
ENOB
log
______________________________________________________________________________________
=
V
2
2
SINAD
+
V
6 02
3
.
2
V
+
1
1 76
.
V
4
2
+
V
5
2
2
through
Figure 21. Aperture Diagram
REF
TRACK AND HOLD
ANALOG INPUT
(MODE 0)
(MODE 1)
(MODE 2)
INTCLK
Serial 16-Bit ADCs
SCLK
SCLK
Multirange Inputs,
13
15
10
TRACK
14
16
11
t
AD
t
AJ
SAMPLE INSTANT
15
12
HOLD
29

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