MPC8308VMAGDA Freescale Semiconductor, MPC8308VMAGDA Datasheet - Page 22

• Manufacturer Part Number: MPC8308VMAGDA
• Description: Microprocessors - MPU E300 MP PbFr 400
• Manufacturer: Freescale Semiconductor

Specifications of MPC8308VMAGDA

• Rohs: yes
• Processor Series: MPC8308
• Core: e300
• Maximum Clock Frequency: 400 MHz
• Interface Type: I2C, JTAG, UART
• Operating Supply Voltage: 0.95 V to 1.05 V
• Maximum Operating Temperature: 0 C to + 105 C
• Mounting Style: SMD/SMT
• Package / Case: MAPBGA-473

Ethernet: Three-Speed Ethernet, MII Management
This figure shows the MII management AC timing diagram.
8.4
This section describes the DC and AC electrical specifications for the 1588 timer.
8.4.1
This table provides the IEEE 1588 timer DC specifications.
22
At recommended operating conditions with LV
MDC fall time
Notes:
1. The symbols used for timing specifications Follow the pattern of t
2. This parameter is dependent on the csb_clk speed. (The MIIMCFG[Mgmt Clock Select] field determines the clock frequency
3. This parameter is dependent on the cbs_clk speed (that is, for a csb_clk of 133 MHz, the delay is 60 ns).
Output high voltage
Output low voltage
Output low voltage
Input high voltage
inputs and t
data timing (MD) for the time t
Also, t
(V) relative to the t
convention is used with the appropriate letter: R (rise) or F (fall).
of the Mgmt Clock EC_MDC.)
Parameter/Condition
MDDVKH
IEEE Std 1588™ Timer Specifications
IEEE 1588 Timer DC Specifications
(first two letters of functional block)(reference)(state)(signal)(state)
Characteristic
symbolizes management data timing (MD) with respect to the time data input signals (D) reach the valid state
(Output)
MDC
(Input)
MDIO
MDIO
MDC
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
Table 27. MII Management AC Timing Specifications (continued)
clock reference (K) going to the high (H) state or setup time. For rise and fall times, the latter
Figure 12. MII Management Interface Timing Diagram
MDC
Table 28. GPIO DC Electrical Characteristics
from clock reference (K) high (H) until data outputs (D) are invalid (X) or data hold time.
t
MDCH
Symbol
DDA
t
MDHF
t
MDDVKH
/LV
t
MDC
DDB
Symbol
1
t
MDKHDX
V
V
V
V
is 3.3 V ± 0.3V
OH
OL
OL
IH
Min
—
t
I
MDCF
OH
I
I
OL
OL
Condition
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
= –8.0 mA
= 3.2 mA
= 8.0 mA
—
t
MDDXKH
Typ
—
t
MDCR
Min
Max
2.4
2.0
—
—
10
MDKHDX
symbolizes management
Freescale Semiconductor
NVDD + 0.3
Unit
ns
Max
0.5
0.4
—
Notes
—
Unit
V
V
V
V
for