MPC8308VMAGDA Freescale Semiconductor, MPC8308VMAGDA Datasheet - Page 78

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MPC8308VMAGDA

Manufacturer Part Number
MPC8308VMAGDA
Description
Microprocessors - MPU E300 MP PbFr 400
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8308VMAGDA

Rohs
yes
Processor Series
MPC8308
Core
e300
Maximum Clock Frequency
400 MHz
Interface Type
I2C, JTAG, UART
Operating Supply Voltage
0.95 V to 1.05 V
Maximum Operating Temperature
0 C to + 105 C
Mounting Style
SMD/SMT
Package / Case
MAPBGA-473

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System Design Information
23.3
Due to large address and data buses, and high operating frequencies, the device can generate transient
power surges and high frequency noise in its power supply, especially while driving large capacitive loads.
This noise must be prevented from reaching other components in the MPC8308 system, and the MPC8308
itself requires a clean, tightly regulated source of power. Therefore, it is recommended that the system
designer place at least one decoupling capacitor at each V
These decoupling capacitors should receive their power from separate V
V
directly under the device using a standard escape pattern. Others may surround the part.
These capacitors should have a value of 0.01 or 0.1 µF. Only ceramic SMT (surface mount technology)
capacitors should be used to minimize lead inductance, preferably 0402 or 0603 sizes.
In addition, it is recommended that there be several bulk storage capacitors distributed around the PCB,
feeding the V
These bulk capacitors should have a low ESR (equivalent series resistance) rating to ensure the quick
response time necessary. They should also be connected to the power and ground planes through two vias
to minimize inductance. Suggested bulk capacitors—100 to 330 µF (AVX TPS tantalum or Sanyo
OSCON). However, customers should work directly with their power regulator vendor for best values and
types of bulk capacitors.
23.4
To ensure reliable operation, it is highly recommended to connect unused inputs to an appropriate signal
level. Unused active low inputs should be tied to NV
inputs should be connected to VSS. All NC (no-connect) signals must remain unconnected.
Power and ground connections must be made to all external V
and V
23.5
The device drivers are characterized over process, voltage, and temperature. For all buses, the driver is a
push-pull single-ended driver type (open drain for I
To measure Z
or V
impedance is the average of two components, the resistances of the pull-up and pull-down devices. When
data is held high, SW1 is closed (SW2 is open), and R
NV
other in value. Then, Z
78
SS
DD
SS
power planes in the PCB, utilizing short traces to minimize inductance. Capacitors may be placed
SS
/2. R
. Then, the value of each resistor is varied until the pad voltage is NV
pins of the device.
Decoupling Recommendations
Connection Recommendations
Output Buffer DC Impedance
P
then becomes the resistance of the pull-up devices. R
DD
0
for the single-ended drivers, an external resistor is connected from the chip pad to NV
, NV
MPC8308 PowerQUICC II Pro Processor Hardware Specification, Rev. 3
DD
0
, GV
= (R
P
DD
+ R
, LV
N
)/2.
DD
planes, to enable quick recharging of the smaller chip capacitors.
2
C, MDIO and HRESET)
DD
P
, GV
is trimmed until the voltage at the pad equals
DD
, NV
DD
DD
, LV
P
, NV
DD
and R
DD
, GV
DD
as required. Unused active high
N
DD
, AV
DD
are designed to be close to each
, NV
DD
and LV
DD1
/2
DD
, AV
(Figure
, GV
DD
Freescale Semiconductor
DD2
pin of the device.
DD
55). The output
, GV
, LV
DD
DD
, LV
, and
DD
DD

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