LPC1313FHN33/01,51 NXP Semiconductors, LPC1313FHN33/01,51 Datasheet - Page 14

• Manufacturer Part Number: LPC1313FHN33/01,51
• Description: ARM Microcontrollers - MCU CortexM3 32bit 32KB
• Manufacturer: NXP Semiconductors

Specifications of LPC1313FHN33/01,51

• Rohs: yes
• Core: ARM Cortex M3
• Processor Series: LPC1313
• Data Bus Width: 32 bit
• Maximum Clock Frequency: 72 MHz
• Program Memory Size: 32 KB
• Data Ram Size: 8 KB
• On-chip Adc: Yes
• Operating Supply Voltage: 2 V to 3.6 V
• Package / Case: HVQFN-33
• Mounting Style: SMD/SMT
• Factory Pack Quantity: 4000

NXP Semiconductors
Table 4.
LPC1311_13_42_43
Product data sheet
Symbol
RESET/PIO0_0
PIO0_1/CLKOUT/
CT32B0_MAT2/
USB_FTOGGLE
PIO0_2/SSEL0/
CT16B0_CAP0
PIO0_3/
USB_VBUS
PIO0_4/SCL
PIO0_5/SDA
PIO0_6/
USB_CONNECT/
SCK0
PIO0_7/CTS
PIO0_8/MISO0/
CT16B0_MAT0
PIO0_9/MOSI0/
CT16B0_MAT1/
SWO
LPC1311/13/42/43 HVQFN33 pin description table
Pin
2
3
8
9
10
11
15
16
17
18
[2]
[3]
[3]
[3]
[4]
[4]
[3]
[3]
[3]
[3]
Start
logic
input
yes
yes
yes
yes
yes
yes
yes
yes
yes
yes
Type Reset
I/O
O
O
O
I/O
I
I
I/O
I/O
O
I/O
I
I/O
O
I/O
O
O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
All information provided in this document is subject to legal disclaimers.
state
[1]
I; PU
-
I; PU
-
-
-
I; PU
-
-
I; PU
-
I; IA
-
I; IA
-
I; PU
-
-
I; PU
-
I; PU
-
-
I; PU
-
-
-
Description
RESET — External reset input with 20 ns glitch filter. A LOW-going pulse
as short as 50 ns on this pin resets the device, causing I/O ports and
peripherals to take on their default states, and processor execution to
begin at address 0.
PIO0_0 — General purpose digital input/output pin with 10 ns glitch filter.
PIO0_1 — General purpose digital input/output pin. A LOW level on this
pin during reset starts the ISP command handler or the USB device
enumeration (USB on LPC1342/43 only, see description of PIO0_3).
CLKOUT — Clock out pin.
CT32B0_MAT2 — Match output 2 for 32-bit timer 0.
USB_FTOGGLE — USB 1 ms Start-of-Frame signal (LPC1342/43 only).
PIO0_2 — General purpose digital input/output pin.
SSEL0 — Slave select for SSP0.
CT16B0_CAP0 — Capture input 0 for 16-bit timer 0.
PIO0_3 — General purpose digital input/output pin. LPC1342/43 only: A
LOW level on this pin during reset starts the ISP command handler, a
HIGH level starts the USB device enumeration.
USB_VBUS — Monitors the presence of USB bus power (LPC1342/43
only).
PIO0_4 — General purpose digital input/output pin (open-drain).
SCL — I
I
PIO0_5 — General purpose digital input/output pin (open-drain).
SDA — I
I
PIO0_6 — General purpose digital input/output pin.
USB_CONNECT — Signal used to switch an external 1.5 kΩ resistor
under software control. Used with the SoftConnect USB feature
(LPC1342/43 only).
SCK0 — Serial clock for SSP0.
PIO0_7 — General purpose digital input/output pin (high-current output
driver).
CTS — Clear To Send input for UART.
PIO0_8 — General purpose digital input/output pin.
MISO0 — Master In Slave Out for SSP0.
CT16B0_MAT0 — Match output 0 for 16-bit timer 0.
PIO0_9 — General purpose digital input/output pin.
MOSI0 — Master Out Slave In for SSP0.
CT16B0_MAT1 — Match output 1 for 16-bit timer 0.
SWO — Serial wire trace output.
2
2
C Fast-mode Plus is selected in the I/O configuration register.
C Fast-mode Plus is selected in the I/O configuration register.
Rev. 5 — 6 June 2012
2
2
C-bus clock input/output (open-drain). High-current sink only if
C-bus data input/output (open-drain). High-current sink only if
32-bit ARM Cortex-M3 microcontroller
LPC1311/13/42/43
© NXP B.V. 2012. All rights reserved.
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