74AUP1T57GW,125 NXP Semiconductors, 74AUP1T57GW,125 Datasheet - Page 10

• Manufacturer Part Number: 74AUP1T57GW,125
• Description: IC LP CONFIG GATE V-XLATR UMT6
• Manufacturer: NXP Semiconductors
• Series: 74AUPr

Specifications of 74AUP1T57GW,125

• Package / Case: SC-70-6, SC-88, SOT-363
• Logic Function: Translator
• Number Of Bits: 2
• Input Type: Voltage
• Output Type: Voltage
• Number Of Channels: 2
• Number Of Outputs/channel: 1
• Differential - Input:output: No/No
• Propagation Delay (max): 3.8ns
• Voltage - Supply: 2.3 V ~ 3.6 V
• Operating Temperature: -40°C ~ 125°C
• Supply Voltage: 2.3 V ~ 3.6 V
• Logic Type: Voltage Level Translator
• Logic Family: AUP
• Input Bias Current (max): 50 mA
• High Level Output Current: - 4 mA
• Low Level Output Current: 4 mA
• Propagation Delay Time: 8.2 ns @ 2.3 V to 2.7 V or 7 ns @ 3 V to 3.6 V
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.3 V
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Maximum Power Dissipation: 250 mW
• Mounting Style: SMD/SMT
• Number Of Circuits: Configurable
• Data Rate: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Rate: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 74AUP1T57GW-G; 74AUP1T57GW-G; 935280464125

NXP Semiconductors
12. Waveforms
Table 10.
74AUP1T57
Product data sheet
Supply voltage
V
2.3 V to 3.6 V
Fig 12. Input A, B and C to output Y propagation delay times
CC
Measurement points are given in
V
OL
Measurement points
and V
OH
are typical output voltage drop that occur with the output load.
Output
V
0.5 × V
A, B, C input
M
Y output
Y output
CC
Table
GND
V
V
V
V
All information provided in this document is subject to legal disclaimers.
OH
OH
OL
OL
V
I
10.
Rev. 3 — 21 July 2010
Input
V
0.5 × V
V
Low-power configurable gate with voltage-level translator
M
M
V
V
M
M
t
t
I
PHL
PLH
V
1.65 V to 3.6 V
V
I
M
V
V
M
M
t
t
PLH
PHL
001aab593
74AUP1T57
t
≤ 3.0 ns
r
= t
© NXP B.V. 2010. All rights reserved.
f
10 of 20