DAC1008D650HN/C1 NXP Semiconductors, DAC1008D650HN/C1 Datasheet - Page 19

• Manufacturer Part Number: DAC1008D650HN/C1
• Description: Digital to Analog Converters - DAC DL 10BIT DAC 650MSPS 2X 4X OR 8X INT
• Manufacturer: NXP Semiconductors

Specifications of DAC1008D650HN/C1

• Rohs: yes
• Factory Pack Quantity: 260

NXP Semiconductors
DAC1008D650
Product data sheet
The worst case clock skew is given by t
The minimum allowable trace delay for the MDS signal is given by t = t
In real applications, the master DAC can be anywhere and both conditions must be
satisfied: t
Example:
 200 ps + 80 ps < t
 280 ps < t
 4.2 cm < L
Fig 10. Clock skew case 2: Master is closest
•
•
•
•
clock generator skew =  80 ps
FR4 substrate  15 cm/ns delay
clock trace length difference = 3 cm and 4 cm
Output sampling rate = 650 Msps
2
< t
mds
slave 1 clock
slave 2 clock
master clock
mds
All information provided in this document is subject to legal disclaimers.
mds
ref clock
< 17.8 cm
< 1192 ps
< TDAC  t
mds
Rev. 3 — 31 January 2012
< 1538 ps  (266 ps + 80 ps)
1
.
PH01
PH02
PH03
2, 4 or 8 interpolating DAC with JESD204A
2
= PH03  PH01.
TDAC
DAC1008D650
001aal071
© NXP B.V. 2012. All rights reserved.
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