DAC1008D650HN/C1 NXP Semiconductors, DAC1008D650HN/C1 Datasheet - Page 21

• Manufacturer Part Number: DAC1008D650HN/C1
• Description: Digital to Analog Converters - DAC DL 10BIT DAC 650MSPS 2X 4X OR 8X INT
• Manufacturer: NXP Semiconductors

Specifications of DAC1008D650HN/C1

• Rohs: yes
• Factory Pack Quantity: 260

NXP Semiconductors
DAC1008D650
Product data sheet
10.2.6 Frame assembly
DAC1008D650 supports only /F/ = 1, which means that every frame clock period carries
one byte per lane. Frame assembly combines the octet of lane_0 with the two MSB bits of
lane_1 and reassembles the original 10-bit sample. The same is done for lane_2 and
lane_3. Tail bits are dropped.
The frame assembler also handles previously triggered errors.
If scrambling is enabled:
If scrambling is disabled:
If a nit_err (not-in-table error) or kout_unexp (unexpected control character) occurs in
lane_0 and/or lane_1, the previous 10-bit sample is repeated twice for I (lane_0,
lane_1). The same is done for Q (lane_2, lane_3).
If a nit_err (not-in-table error) or kout_unexp (unexpected control character) occurs in
lane_0 and/or lane_1, the previous 10-bit sample will be repeated once for I (lane_0,
lane_1). The same is done for Q (lane_2, lane_3).
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 31 January 2012
2, 4 or 8 interpolating DAC with JESD204A
DAC1008D650
© NXP B.V. 2012. All rights reserved.
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