1893YI-10LF IDT, 1893YI-10LF Datasheet - Page 118

• Manufacturer Part Number: 1893YI-10LF
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893YI-10LF

• Rohs: yes
• Part # Aliases: ICS1893YI-10LF

ICS1893 Rev C 6/6/00
Table 9-6.
RXD0,
RXD1,
RXD2,
RXD3
RXDV
RXER
RXTRI
TXCLK
TXD0–3
TXEN
TXER
MII Pin
Name
ICS1893 Data Sheet - Release
SRD0,
SRD1,
SRD2,
SRD3
–
SRD4
STCLK
STD0,
STD1,
STD2,
STD3
–
STD4
MAC/Repeater Interface Pins: 100M Symbol Interface (Continued)
Symbol
Name
100M
Pin
No.
Pin
35,
34,
33,
45,
46,
47,
32
36
39
41
43
48
44
42
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
Connect
Connect
Output
Output
Output
Type
Input
Input
Input
Pin
No
No
Symbol Receive Data 0–3.
In 100M Symbol mode:
Receive Data Valid.
For the 100M Symbol Interface, this pin is a no connect. For
more information, see
Symbol Receive Data 4.
This pin’ s description is the same as that given in
Receive (Interface), Tri-State.
This pin’ s input is from a MAC. When this pin’ s signal is logic:
Symbol Transmit Clock.
This pin’ s description is the same as that given in
Symbol Transmit Data 0–3.
In 100M Symbol mode:
Transmit Enable.
For the 100M Symbol Interface, this pin is a no connect. For
more information, see
Symbol Transmit Data 4.
This pin’ s description is the same as that given in
•
•
•
Note: The signal on the ICS1893’ s SRD[3:0] pins are
•
•
•
•
Note: In 100M Symbol mode, TXEN is not used because the
The ICS1893’ s SRD0 pin transmits the least-significant bit
and the SRD4 pin transmits the most-significant bit of the
symbol received from its MAC/Repeater interface.
The ICS1893 continually transfers the data it receives from
its MDI to its SRD[4:0] pins (that is, to its MAC/Repeater
Interface). In the 100M Symbol mode, data is not framed.
Therefore, the ICS1893 does not assert its RXDV signal.
The ICS1893 transfers its receive data to the SRD[4:0] pins
synchronously on the rising edges of its SRCLK signal.
Low, the MAC indicates it is not in a tri-state condition.
High, the MAC indicates it is in a tri-state condition. In this
case, the ICS1893 acts to ensure that only one PHY is active
at a time. (A PHY address of 00 also tri-states the MII
interface.)
The ICS1893 STD0 pin receives the least-significant bit and
the STD4 pin receives the most-significant bit of the symbol
received from the MAC/Repeater interface.
The signals on the ICS1893 STD[4:0] pins are continually
and synchronously sampled on the rising edges of its
STCLK. These signals are independent of the TXEN signal.
118
conditioned by the RXTRI pin.
MAC/Repeater is responsible for sending both IDLE
symbols and data.
Chapter 9 Pin Diagram, Listings, and Descriptions
Table
Table
Pin Description
6-1.
6-1.
Table
Table
Table
June, 2000
9-5.
9-5.
9-5.