1893YI-10LF IDT, 1893YI-10LF Datasheet - Page 68

• Manufacturer Part Number: 1893YI-10LF
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893YI-10LF

• Rohs: yes
• Part # Aliases: ICS1893YI-10LF

8.3.2 100Base-TX Full Duplex (bit 1.14)
8.3.3 100Base-TX Half Duplex (bit 1.13)
8.3.4 10Base-T Full Duplex (bit 1.12)
8.3.5 10Base-T Half Duplex (bit 1.11)
ICS1893 Rev C 6/6/00
The STA reads this bit to learn if the ICS1893 can support 100Base-TX, full-duplex operations. The
ISO/IEC specification requires that the ICS1893 must set bit 1.14 to logic:
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•
Bit 1.14 is a Command Override Write bit, which allows an STA to alter the default value of this bit. [See the
description of bit 16.15, the Command Override Write Enable bit, in
Control Register”
The STA reads this bit to learn if the ICS1893 can support 100Base-TX, half-duplex operations. The
ISO/IEC specification requires that the ICS1893 must set bit 1.13 to logic:
•
•
This bit 1.13 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control Register”
The STA reads this bit to learn if the ICS1893 can support 10Base-T, full-duplex operations. The ISO/IEC
specification requires that the ICS1893 must set bit 1.12 to logic:
•
•
This bit 1.12 is a Command Override Write bit, which allows an STA to alter the default value of this bit.
[See the description of bit 16.15, the Command Override Write Enable bit, in
Extended Control Register”
The STA reads this bit to learn if the ICS1893 can support 10Base-T, half-duplex operations. The ISO/IEC
specification requires that the ICS1893 must set bit 1.11 to logic:
•
•
Bit 1.11 of the ICS1893 Status Register is a Command Override Write bit., which allows an STA to alter the
default value of this bit. [See the description of bit 16.15, the Command Override Write Enable bit, in
Section 8.11, “ Register 16: Extended Control Register”
Zero if it cannot support 100Base-TX, full-duplex operations.
One if it can support 100Base-TX, full-duplex operations. (For the ICS1893, the default value of bit 1.14
is logic one, in that the ICS1893 supports 100Base-TX, full-duplex operations.)
Zero if it cannot support 100Base-TX, half-duplex operations.
One if it can support 100Base-TX, half-duplex operations. (For the ICS1893, the default value of bit 1.13
is logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1893
supports 100Base-TX, half-duplex operations.)
Zero if it cannot support 10Base-T, full-duplex operations.
One if it can support 10Base-T, full-duplex operations. (For the ICS1893, the default value of bit 1.12 is
logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1893
supports 10Base-T, full-duplex operations.)
Zero if it cannot support 10Base-T, half-duplex operations.
One if it can support 10Base-T, half-duplex operations. (For the ICS1893, the default value of bit 1.11 is
logic one. Therefore, when an STA reads the Status Register, the STA is informed that the ICS1893
supports 10Base-T, half-duplex operations.)
ICS1893 Data Sheet - Release
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Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
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Section 8.11, “ Register 16: Extended
Chapter 8 Management Register Set
Section 8.11, “ Register 16:
Section 8.11, “ Register 16:
June, 2000