1893YI-10LF IDT, 1893YI-10LF Datasheet - Page 120

• Manufacturer Part Number: 1893YI-10LF
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893YI-10LF

• Rohs: yes
• Part # Aliases: ICS1893YI-10LF

ICS1893 Rev C 6/6/00
Table 9-7.
RXDV
RXER
RXTRI
TXCLK
TXD0
TXD1,
TXD2,
TXD3
TXEN
TXER
MII Pin
Name
ICS1893 Data Sheet - Release
10RXDV
–
10TCLK
10TD
–
10TXEN
–
MAC/Repeater Interface Pins: 10M Serial Interface (Continued)
Symbol
Name
100M
Pin
No.
Pin
46,
47,
36
39
41
43
45
48
44
42
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
connect
connect
connect
Output
Output
Type
Input
Input
Input
Pin
No
No
No
10M (Serial Interface) Receive Data Valid.
The ICS1893 asserts 10RXDV to indicate to the MAC/repeater
that data is available on the MII Receive Bus (RXD[3:0]). The
ICS1893:
Receive Error.
For the 10M Serial Interface, this pin is a no connect. For more
information, see
Receive (Interface), Tri-State.
10M (Serial Interface) Transmit Clock.
This pin’ s description is the same as that given in
10M (Serial Interface) Transmit Data.
This pin’ s description is the same as that given in
Transmit Data 1–3.
For the 10M Serial Interface, these pins are a no connect. For
more information, see
10M (Serial Interface) Transmit Enable.
This pin’ s description is the same as that given in
Transmit Error.
For the 10M Serial Interface, this pin is a no connect. For more
information, see
Note: 10RXDV is synchronous with the Receive Data Clock,
•
•
•
•
Asserts 10RXDV after it detects and recovers the
Start-of-Stream delimiter, /J/K/. (For the timing reference,
see
Synchronous Receive Timing”
De-asserts 10RXDV after it detects either the End-of-Stream
delimiter (/T/R/) or a signal error.
The input on this pin is from a MAC. When the signal on this
pin is logic:
– Low, the MAC indicates that it is not in a tri-state condition.
– High, the MAC indicates that it is in a tri-state condition. In
If the PHY address is 00, the ICS1893 acts as if the RX-TRI
pin is held high.
120
this case, the ICS1893 acts to ensure that only one PHY is
active at a time.
10RCLK.
Chapter 10.5.6, “ MII / 100M Stream Interface:
Table
Table
Chapter 9 Pin Diagram, Listings, and Descriptions
Table
6-2.
6-2.
Pin Description
6-2.
.)
Table
Table
Table
June, 2000
9-5.
9-5.
9-5.