1893YI-10LFT IDT, 1893YI-10LFT Datasheet - Page 97

• Manufacturer Part Number: 1893YI-10LFT
• Description: Ethernet ICs 3.3V 10/100 BASE TX INTEGRATED PHYCEIVER
• Manufacturer: IDT

Specifications of 1893YI-10LFT

• Rohs: yes
• Part # Aliases: ICS1893YI-10LFT

8.13 Register 18: 10Base-T Operations Register
8.13.1 Remote Jabber Detect (bit 18.15)
ICS1893 Rev C 6/6/00
The 10Base-T Operations Register provides an STA with the ability to monitor and control the ICS1893
activity while the ICS1893 is operating in 10Base-T mode.
Note:
1. For an explanation of acronyms used in
2. During any write operation to any bit in this register, the STA must write the default value to all
Table 8-20.
The Remote Jabber Detect bit is provided to indicate that an ICS1893 port has detected a Jabber Condition
on its receive path. This bit is reset to logic zero on a read of the 10Base-T operations register. When this
bit is logic:
•
•
This bit is a latching high bit. (For more information on latching high and latching low bits, see
8.1.4.1, “ Latching High Bits”
Note:
18.15
18.14
18.13
18.12
18.11
18.10
18.9
18.8
18.7
18.6
18.5
18.4
18.3
18.2
18.1
18.0
Bit
Zero, it indicates a Jabber Condition has not occurred on the port’ s receive path since either the last read
of this register or the last reset of the associated port.
One, it indicates a Jabber Condition has occurred on the port’ s receive path since either the last read of
this register or the last reset of the associated port.
ICS1893 - Release
Reserved bits.
This bit is provided for information purposes only (that is, no actions are taken by the port). The
ISO/IEC specification defines the Jabber Condition in terms of a port’ s transmit path. To set this bit,
an ICS1893 port monitors its receive path and applies the ISO/IEC Jabber criteria to its receive
path.
Remote Jabber
Detect
Polarity reversed
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
ICS reserved
Jabber inhibit
ICS reserved
Auto polarity inhibit
SQE test inhibit
Link Loss inhibit
Squelch inhibit
Definition
10Base-T Operations Register (register 18 [0x12])
No Remote Jabber
Condition detected
Normal polarity
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Normal Jabber behavior
Read unspecified
Polarity automatically
corrected
Normal SQE test behavior
Normal Link Loss behavior Link Always = Link Pass
Normal squelch behavior
and
Copyright © 2000, Integrated Circuit Systems, Inc.
All rights reserved.
Section 8.1.4.2, “ Latching Low Bits”
When Bit = 0
Table
97
8-20, see
Remote Jabber Condition
Detected
Polarity reversed
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Read unspecified
Jabber Check disabled
Read unspecified
Polarity not automatically
corrected
SQE test disabled
No squelch
When Bit = 1
Chapter 1, “ Abbreviations and Acronyms”
.)
Chapter 8 Management Register Set
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/0
RW/1
cess
Ac-
RW
RW
RW
RW
RW
RO
RO
SF
LH
LH
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Section
fault
De-
June, 2000
0
0
–
–
–
–
–
–
–
–
0
1
0
0
0
0
Hex
.
–
–
–
0