SC16IS762IPW-F NXP Semiconductors, SC16IS762IPW-F Datasheet - Page 56

• Manufacturer Part Number: SC16IS762IPW-F
• Description: UART Interface IC I2C/SPI-UARTBRIDGE W/IRDA AND GPIO
• Manufacturer: NXP Semiconductors
• Type: RS-232 or RS-485 or IrDAr

Specifications of SC16IS762IPW-F

• Product Category: UART Interface IC
• Rohs: yes
• Number Of Channels: 2
• Data Rate: 5 Mbps
• Supply Voltage - Max: 3.6 V
• Supply Voltage - Min: 2.3 V
• Supply Current: 6 mA
• Maximum Operating Temperature: + 95 C
• Minimum Operating Temperature: - 40 C
• Package / Case: TSSOP-28
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 2.5 V, 3.3 V
• Factory Pack Quantity: 2500
• Part # Aliases: SC16IS762IPW,128

NXP Semiconductors
18. Appendix
SC16IS752_SC16IS762
Product data sheet
18.1.1 IrDA wake-up
18.1.2 Clearing of RX FIFO overflow
18.1.3 Interrupt priority encoder
18.1.4 Time-out interrupt
18.1 Errata for Rev. E added 12 August 2011
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
In Rev. D, the UART cannot wake up through RX pin once the UART is put to sleep by the
host.
In Rev. D, once the receive FIFO overflows, the receive FIFO cannot be cleared with FIFO
reset command if the UART is continuously receiving data.
When the edge of the IOR signal (an internal signal that reads IIR register) comes close to
the X1 clock that generates the interrupt, the value of the Interrupt Indication Register (IIR)
might not be correct. This issue might occur if the X1 clock is very slow and the host read
operation is very fast in response to the interrupt from the UART.
If the host reads the receive FIFO at the at the same time as a time-out interrupt condition
happens, the host might read 0xCC (time-out) in the Interrupt Indication Register (IIR), but
bit 0 of the Line Status Register (LSR) is not set (means there is not data in the
receive FIFO). This is a conflict of the receive FIFO status when IIR = 0xCC (time-out), it
indicates that there are data in the receive FIFO, but LSR bit 0 = 0 indicates otherwise.
Fig 39. Temperature profiles for large and small components
temperature
MSL: Moisture Sensitivity Level
All information provided in this document is subject to legal disclaimers.
Dual UART with I
Rev. 9 — 22 March 2012
= minimum soldering temperature
maximum peak temperature
minimum peak temperature
= MSL limit, damage level
SC16IS752; SC16IS762
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
temperature
peak
© NXP B.V. 2012. All rights reserved.
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