C8051F555-IMR Silicon Labs, C8051F555-IMR Datasheet - Page 254

no-image

C8051F555-IMR

Manufacturer Part Number
C8051F555-IMR
Description
8-bit Microcontrollers - MCU 50 MIPS 16 kB 2 kB CAN2.0 SPI
Manufacturer
Silicon Labs
Datasheet

Specifications of C8051F555-IMR

Rohs
yes
Core
8051
Processor Series
C8051
Data Bus Width
8 bit
C8051F55x/56x/57x
254
Parameter
Master Mode Timing
T
T
T
T
Slave Mode Timing
T
T
T
T
T
T
T
T
T
T
*Note: T
MCKH
MCKL
MIS
MIH
SE
SD
SEZ
SDZ
CKH
CKL
SIS
SIH
SOH
SLH
SYSCLK
Description
SCK High Time
SCK Low Time
MISO Valid to SCK Shift Edge
SCK Shift Edge to MISO Change
NSS Falling to First SCK Edge
Last SCK Edge to NSS Rising
NSS Falling to MISO Valid
NSS Rising to MISO High-Z
SCK High Time
SCK Low Time
MOSI Valid to SCK Sample Edge
SCK Sample Edge to MOSI Change
SCK Shift Edge to MISO Change
Last SCK Edge to MISO Change 
(CKPHA = 1 ONLY)
is equal to one period of the device system clock (SYSCLK).
*
*
(See Figure 24.10 and Figure 24.11)
(See Figure 24.8 and Figure 24.9)
Table 24.1. SPI Slave Timing Parameters
Rev. 1.1
Min
1 x T
1 x T
1 x T
2 x T
2 x T
5 x T
5 x T
2 x T
2 x T
6 x T
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
SYSCLK
0
+ 20
Max
4 x T
4 x T
4 x T
8 x T
SYSCLK
SYSCLK
SYSCLK
SYSCLK
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for C8051F555-IMR