74LVC16374ADG-T NXP Semiconductors, 74LVC16374ADG-T Datasheet - Page 6

• Manufacturer Part Number: 74LVC16374ADG-T
• Description: Flip Flops 3.3V 16-BIT POS D-TYPE 3-S
• Manufacturer: NXP Semiconductors

Specifications of 74LVC16374ADG-T

• Product Category: Flip Flops
• Rohs: yes
• Number Of Circuits: 2
• Logic Family: LVC
• Logic Type: D-Type Edge Triggered Flip-Flop
• Polarity: Non-Inverting
• Input Type: Single-Ended
• Propagation Delay Time: 3.8 ns at 3.3 V
• High Level Output Current: - 24 mA
• Supply Voltage - Max: 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: SOT-362
• Minimum Operating Temperature: - 40 C
• Number Of Input Lines: 8
• Number Of Output Lines: 8
• Factory Pack Quantity: 2000
• Supply Voltage - Min: 1.2 V
• Part # Aliases: 74LVC16374ADGG,518

NXP Semiconductors
Table 2.
6. Functional description
Table 3.
[1]
7. Limiting values
Table 4.
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
74LVC_LVCH16374A
Product data sheet
Symbol
1OE, 2OE
GND
V
1Q0 to 1Q7 2, 3, 5, 6, 8, 9, 11, 12
2Q0 to 2Q7 13, 14, 16, 17, 19, 20, 22, 23
1D0 to 1D7 47, 46, 44, 43, 41, 40, 38, 37
2D0 to 2D7 36, 35, 33, 32, 30, 29, 27, 26
1CP, 2CP
Operating mode
Load and read register
Load register and disable outputs
Symbol
V
I
V
I
V
I
I
I
T
IK
OK
O
CC
GND
stg
CC
CC
I
O
H = HIGH voltage level;
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW CP transition;
L = LOW voltage level;
l = LOW voltage level one set-up time prior to the HIGH-to-LOW CP transition;
 = LOW-to-HIGH transition;
Z = high-impedance OFF-state.
Pin description
Function selection
Limiting values
Pin
SOT370-1 and SOT362-1
1, 24
4, 10, 15, 21, 28, 34, 39, 45
7, 18, 31, 42
48, 25
Parameter
supply voltage
input clamping current
input voltage
output clamping current
output voltage
output current
supply current
ground current
storage temperature
5.2 Pin description
[1]
Input
nOE
L
L
H
H
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SOT1134-1
A30, A13
A32, A3, A8, A11, A16, A19, A24, A27 ground (0 V)
A1, A10, A17, A26
B20, A31, D5, D1, A2, B2, B3, A5
A6, B5, B6, A9, D2, D6, A12, B8
B18, A28, D8, D4, A25, B16, B15, A22 data input
A21, B13, B12, A18, D3, D7, A15, B10 data input
A29, A14
Conditions
V
V
output HIGH-or LOW-state
output 3-state
V
Rev. 11 — 16 January 2013
I
O
O
< 0 V
74LVC16374A; 74LVCH16374A
> V
= 0 V to V
nCP




CC
16-bit edge-triggered D-type flip-flop; 5 V tolerant; 3-state
or V
CC
O
< 0 V
nDn
l
h
l
h
[1]
[2]
[2]
Internal flip-flop Output nQ0 to nQ7
L
H
L
H
Min
0.5
50
0.5
-
0.5
0.5
-
-
100
65
Description
output enable input (active LOW)
supply voltage
data output
data output
clock input
Max
+6.5
-
+6.5
50
V
+6.5
50
100
-
+150
CC
L
H
Z
Z
+ 0.5
© NXP B.V. 2013. All rights reserved.
Unit
V
mA
V
mA
V
V
mA
mA
mA
C
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