DS3172 Maxim Integrated, DS3172 Datasheet - Page 42
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DS3172
Manufacturer Part Number
DS3172
Description
Network Controller & Processor ICs Dual DS3/E3 Single Chip Transceiver
Manufacturer
Maxim Integrated
Datasheet
1.DS3171.pdf
(234 pages)
Specifications of DS3172
Part # Aliases
90-31720-000
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Figure 8-16. DS3 SCT Mode Receive Serial Interface Pin Timing
Figure 8-17. E3 G.751 SCT Mode Receive Serial Interface Pin Timing
Figure 8-18. E3 G.832 SCT Mode Receive Serial Interface Pin Timing
8.3.4
Figure 8-19
the A[0]/BSWAP signal controls whether or not to byte swap. In 8-bit mode, the A[0]/BSWAP signal is used as the
LSB of the address bus (A[0]). The selection of databus size is determined by the WIDTH input signal. See also
Section 10.1.1.
DS3 RGCLK
E3 RGCLK
RCLKO or
RCLKO or
DS3 RSER
DS3 RDEN
E3 RGCLK
RCLKO or
E3 RSER
E3 RDEN
RSOFO
E3 RSER
E3 RDEN
RSOFO
RCLKI
RCLKI
RCLKI
RSOF
Microprocessor Interface Functional Timing
and
1
1
Figure 8-21
1
2
2
2
3
3
3
X1
4
4
show examples of a 16-bit databus and an 8-bit databus, respectively. In 16-bit mode,
4
5
5
5
6
6
FA1 11110110
6
FAS 1111010000
7
7
7
8
8
8
9
9
9
10
10
10
42
11
11
11
12
12
12
13
13
13
FA2 00101000
14
A
14
14
15
15
N
15
16
17
18
19
20
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