XRT83L34ES Exar, XRT83L34ES Datasheet - Page 17
XRT83L34ES
Manufacturer Part Number
XRT83L34ES
Description
Peripheral Drivers & Components - PCIs
Manufacturer
Exar
Datasheet
1.XRT83L34ES.pdf
(99 pages)
Specifications of XRT83L34ES
Product Category
Peripheral Drivers & Components - PCIs
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QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
S
IGNAL
TAOS_1
RD_DS
N
AME
P
70
70
IN
#
T
YPE
I
Read Strobe/Data Strobe/Transmit All Ones Command Input - Channel
1:
The exact function of this input pin depends upon whether the XRT83L34
device has been configure to operate in the HOST or Hardware Mode, as
described below.
HOST Mode Operation - READ Strobe/Data Strobe Input:
The exact function of this input pin depends upon which mode the Micropro-
cessor Interface has been configured to operate in, as described below.
Intel-Asynchronous Mode - RD* - READ Strobe Input:
If the MIcroprocessor Interface is operating in the Intel-Asynchronous Mode,
then this input pin will function as the RD* (Active Low READ Strobe) input
signal from the Microprocessor. Once this active-low signal is asserted, then
the XRT83L34 device will place the contents of the addressed register on the
Microprocessor Interface Bi-Directional Data Bus (D[7:0]). When this signal
is negated, then the Bi-Directional Data Bus will be tri-stated.
Motorola-Asynchronous Mode - DS* - Data Strobe Input:
If the Microprocessor Interface is operating in the Motorola-Asynchronous
Mode, then this input pin will function as the DS* (Data Strobe) input signal
.
Hardware Mode Operation - Transmit All One Command Input - Channel
1:
See “Transmit All Ones Command Input - Channel n: (Hardware
Mode ONLY)” on page 12.
N
OTE
: Internally pulled “Low” with a 50kΩ resistor.
14
D
ESCRIPTION
XRT83L34
REV. 1.0.1
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