XRT83VSH314ES Exar, XRT83VSH314ES Datasheet - Page 32

• Manufacturer Part Number: XRT83VSH314ES
• Description: Peripheral Drivers & Components - PCIs 14 CHT1/E1LIUSH LOW COST VERSION
• Manufacturer: Exar

Specifications of XRT83VSH314ES

• Product Category: Peripheral Drivers & Components - PCIs
• Rohs: yes

XRT83VSH314
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
The arbitrary pulse generator divides the pulse into eight individual segments. Each segment is set by a 7-Bit
binary word by programming the appropriate channel register. This allows the system designer to set the
overshoot, amplitude, and undershoot for a unique line build out. The MSB (bit 7) is a sign-bit. If the sign-bit is
set to "0", the segment will move in a positive direction relative to a flat line (zero) condition. If this sign-bit is
set to "1", the segment will move in a negative direction relative to a flat line condition. The resolution of the
DAC is typically 45mV per LSB. Thus, writing 7-bit = 1111111 will clamp the output at either voltage rail
corresponding to a maximum amplitude. A pulse with numbered segments is shown in
F
N
For T1: Address:0x0D hex
For E1: Address: 0xF4 hex, bit D0
To program the transmit output pulse, once the arbitrary pulse has been selected, write the appropriate values
into the segment registers in
The transmit output pulse is divided into eight individual segments. Segment 1 corresponds to the beginning of
the pulse and segment 8 to end the pulse. The value for each segment can be programed individually through
a corresponding 8-bit register. In normal operation, i.e., non-arbitrary mode, codes are stored in an internal
ROM are used to generate the pulse shape, as shown in
4.6.2
4.6.3
IGURE
OTE
: By default, the arbitrary segments are programmed to 0x00h. The transmitter outputs will result in an all zero
pattern to the line interface.
18. A
Segment
1
2
3
4
5
6
7
8
Arbitrary Pulse Generator For T1 and E1
Setting Registers to select an Aribtrary Pulse
RBITRARY
P
Register
ULSE
0xn8
0xn9
0xna
0xnb
0xnc
0xnd
0xne
0xnf
Table
S
EGMENT
11.
A
1
SSIGNMENT
2
3
29
Table
4
11. Typical ROM values are given below in Hex.
5
6
7
8
Figure
18.
REV. 1.0.1