XRT83VSH314ES Exar, XRT83VSH314ES Datasheet - Page 7
XRT83VSH314ES
Manufacturer Part Number
XRT83VSH314ES
Description
Peripheral Drivers & Components - PCIs 14 CHT1/E1LIUSH LOW COST VERSION
Manufacturer
Exar
Datasheet
1.XRT83VSH314ES.pdf
(80 pages)
Specifications of XRT83VSH314ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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MICROPROCESSOR
REV. 1.0.1
1.0 PIN DESCRIPTIONS
WR_R/W
RDY_TA
ALE_TS
RD_WE
µPCLK
N
INT
CS
AME
C19
D18
AA3
AB2
A22
A20
P
B3
IN
T
YPE
O
O
I
I
I
I
I
Chip Select Input
Active low signal. This signal enables the microprocessor interface by pulling
chip select "Low". The microprocessor interface is disabled when the chip
select signal returns "High".
N
Address Latch Enable Input (Transfer Start)
See the Microprocessor section of this datasheet for a description.
N
Write Strobe Input (Read/Write)
See the Microprocessor section of this datasheet for a description.
N
Read Strobe Input (Write Enable)
See the Microprocessor section of this datasheet for a description.
N
Ready Output (Transfer Acknowledge)
See the Microprocessor section of this datasheet for a description.
Interrupt Output
Active low signal. This signal is asserted "Low" when a change in alarm status
occurs. Once the status registers have been read, the interrupt pin will return
"High". GIE (Global Interrupt Enable) must be set "High" in the appropriate
global register to enable interrupt generation.
N
Micro Processor Clock Input
In a synchronous microprocessor interface, µPCLK is used as the internal tim-
ing reference for programming the LIU.
N
OTE
OTE
OTE
OTE
OTE
OTE
: Internally pulled "High" with a 50k
: Internally pulled "Low" with a 50k
: Internally pulled "Low" with a 50k
: Internally pulled "Low" with a 50k
: This pin is an open-drain output that requires an external 10KΩ pull-up
: Internally pulled "Low" with a 50k
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
resistor.
4
D
ESCRIPTION
Ω
Ω
Ω
Ω
Ω
resistor.
resistor.
resistor.
resistor.
resistor.
XRT83VSH314
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