XRT83VSH314ES Exar, XRT83VSH314ES Datasheet - Page 61
XRT83VSH314ES
Manufacturer Part Number
XRT83VSH314ES
Description
Peripheral Drivers & Components - PCIs 14 CHT1/E1LIUSH LOW COST VERSION
Manufacturer
Exar
Datasheet
1.XRT83VSH314ES.pdf
(80 pages)
Specifications of XRT83VSH314ES
Product Category
Peripheral Drivers & Components - PCIs
Rohs
yes
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REV. 1.0.1
N
OTE
B
B
: The GIE bit in the global register 0xE0h must be set to "1" in addition to the individual register bits to enable the
D1
D0
D7
D6
D5
D4
D3
D2
IT
IT
interrupt pin.
LCV_OFIS Line Code Violation / Overflow Interrupt Status
Reserved
Reserved
DMOIS
AISDIS
QRPD
RLOS
FLSIS
N
N
AME
AME
T
T
ABLE
ABLE
Receiver Loss of Signal
The receiver loss of signal detection is always active regardless if
the interrupt generation is disabled. This bit indicates the RLOS
activity. An interrupt will not occur unless the RLOSIE is set to "1"
in the channel register 0x04h and GIE is set to "1" in the global
register 0xE0h.
0 = No Alarm
1 = An RLOS condition is present
Quasi Random Pattern Detection
The quasi random pattern detection is always active regardless if
the interrupt generation is disabled. This bit indicates that a QRPD
has been detected. An interrupt will not occur unless the QRPDIE
is set to "1" in the channel register 0x04h and GIE is set to "1" in
the global register 0xE0h.
0 = No Alarm
1 = A QRP is detected
This Bit is Reserved
Digital Monitor Output Interrupt Status
0 = No change
1 = Change in status occurred
FIFO Limit Interrupt Status
0 = No change
1 = Change in status occurred
0 = No change
1 = Change in status occurred
This Bit is Reserved
Alarm Indication Signal Detection Interrupt Status
0 = No change
1 = Change in status occurred
29: M
30: M
ICROPROCESSOR
ICROPROCESSOR
C
C
HANNEL
HANNEL
14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
0-13 (0
0-13 (0
F
F
UNCTION
UNCTION
R
R
58
EGISTER
EGISTER
X
X
05
06
H
H
-0
-0
0
X
0
X
D5
D6
X
X
05
06
H
H
)
)
H
H
B
B
IT
IT
D
D
ESCRIPTION
ESCRIPTION
Register
Register
XRT83VSH314
Type
Type
RUR
RUR
RUR
RUR
RUR
RUR
RO
RO
(HW reset)
(HW reset)
Default
Default
Value
Value
0
0
0
0
0
0
0
0
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