74AUP2G125GT-G NXP Semiconductors, 74AUP2G125GT-G Datasheet - Page 15

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74AUP2G125GT-G

Manufacturer Part Number
74AUP2G125GT-G
Description
Buffers & Line Drivers 1.8V DUAL BUS BUFFER LDRVR 3S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP2G125GT-G

Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
2
Number Of Output Lines
2
Polarity
Non-Inverting
Supply Voltage - Max
3.6 V
Supply Voltage - Min
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-833-8
High Level Output Current
- 4 mA
Logic Family
AUP
Logic Type
CMOS
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
2
Output Type
3-State
Propagation Delay Time
19 ns at 1.1 V to 1.3 V
Factory Pack Quantity
5000
Part # Aliases
74AUP2G125GT,115
NXP Semiconductors
Fig 12. Package outline SOT833-1 (XSON8)
74AUP2G125
Product data sheet
XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm
DIMENSIONS (mm are the original dimensions)
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
UNIT
mm
SOT833-1
VERSION
OUTLINE
max
A
terminal 1
index area
0.5
e
(1)
(2)
max
0.04
L
A
1
1
0.25
0.17
b
IEC
- - -
1
8
2.0
1.9
D
e
1
1.05
0.95
E
0
2
7
MO-252
JEDEC
0.6
All information provided in this document is subject to legal disclaimers.
e
e
D
REFERENCES
1
0.5
e
1
Rev. 10 — 8 February 2013
3
6
0.35
0.27
L
JEITA
e
- - -
1
0.40
0.32
scale
L
1
1
b
4
5
A
L
1
E
Low-power dual buffer/line driver; 3-state
A
(2)
2 mm
PROJECTION
EUROPEAN
74AUP2G125
© NXP B.V. 2013. All rights reserved.
ISSUE DATE
07-11-14
07-12-07
SOT833-1
15 of 24

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