74AUP2G125GT-G NXP Semiconductors, 74AUP2G125GT-G Datasheet - Page 2

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74AUP2G125GT-G

Manufacturer Part Number
74AUP2G125GT-G
Description
Buffers & Line Drivers 1.8V DUAL BUS BUFFER LDRVR 3S
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74AUP2G125GT-G

Product Category
Buffers & Line Drivers
Rohs
yes
Number Of Input Lines
2
Number Of Output Lines
2
Polarity
Non-Inverting
Supply Voltage - Max
3.6 V
Supply Voltage - Min
0.8 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-833-8
High Level Output Current
- 4 mA
Logic Family
AUP
Logic Type
CMOS
Low Level Output Current
4 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
2
Output Type
3-State
Propagation Delay Time
19 ns at 1.1 V to 1.3 V
Factory Pack Quantity
5000
Part # Aliases
74AUP2G125GT,115
NXP Semiconductors
3. Ordering information
Table 1.
4. Marking
Table 2.
[1]
5. Functional diagram
74AUP2G125
Product data sheet
Type number
74AUP2G125DC
74AUP2G125GT
74AUP2G125GF
74AUP2G125GD
74AUP2G125GM
74AUP2G125GN
74AUP2G125GS
Type number
74AUP2G125DC
74AUP2G125GT
74AUP2G125GF
74AUP2G125GD
74AUP2G125GM
74AUP2G125GN
74AUP2G125GS
Fig 1.
The pin 1 indicator is located on the lower left corner of the device, below the marking code.
Logic symbol
Ordering information
Marking codes
Package
Temperature range Name
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
40 C to +125 C
1OE
2OE
1A
2A
001aah931
1Y
2Y
All information provided in this document is subject to legal disclaimers.
VSSOP8
XSON8
XSON8
XSON8
XQFN8
XSON8
XSON8
Rev. 10 — 8 February 2013
Description
plastic very thin shrink small outline package; 8 leads;
body width 2.3 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 1  1.95  0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35  1  0.5 mm
plastic extremely thin small outline package; no leads;
8 terminals; body 3  2  0.5 mm
plastic, extremely thin quad flat package; no leads;
8 terminals; body 1.6  1.6  0.5 mm
extremely thin small outline package; no leads;
8 terminals; body 1.2  1.0  0.35 mm
extremely thin small outline package; no leads;
8 terminals; body 1.35  1.0  0.35 mm
Marking code
p25
p25
aM
p25
p25
aM
aM
Fig 2.
IEC logic symbol
Low-power dual buffer/line driver; 3-state
[1]
EN1
EN2
001aah932
74AUP2G125
1
2
© NXP B.V. 2013. All rights reserved.
Version
SOT765-1
SOT833-1
SOT1089
SOT996-2
SOT902-2
SOT1116
SOT1203
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